
SN74LVC112A Series
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Manufacturer: Texas Instruments
Catalog
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Key Features
• Operates from 1.65V to 3.6VInputs accept voltages to 5.5VMax tpd of 4.8ns at 3.3VTypical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°CLatch-up performance exceeds 250mA per JESD 17Operates from 1.65V to 3.6VInputs accept voltages to 5.5VMax tpd of 4.8ns at 3.3VTypical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°CLatch-up performance exceeds 250mA per JESD 17
Description
AI
This dual negative-edge-triggered J-K flip-flop is designed for 1.65V to 3.6V VCC operation.
This dual negative-edge-triggered J-K flip-flop is designed for 1.65V to 3.6V VCC operation.