SN74HCS595PWR
Active8-BIT SHIFT REGISTER WITH SCHMITT-TRIGGER INPUTS AND 3-STATE OUTPUT REGISTERS
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SN74HCS595PWR
Active8-BIT SHIFT REGISTER WITH SCHMITT-TRIGGER INPUTS AND 3-STATE OUTPUT REGISTERS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HCS595PWR |
|---|---|
| Function | Serial to Parallel |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Supplier Device Package | 16-TSSOP |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.23 | |
| 10 | $ 0.15 | |||
| 25 | $ 0.14 | |||
| 100 | $ 0.12 | |||
| 250 | $ 0.11 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.10 | |||
| Digi-Reel® | 1 | $ 0.23 | ||
| 10 | $ 0.15 | |||
| 25 | $ 0.14 | |||
| 100 | $ 0.12 | |||
| 250 | $ 0.11 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.10 | |||
| Tape & Reel (TR) | 2000 | $ 0.09 | ||
| 4000 | $ 0.09 | |||
| 6000 | $ 0.09 | |||
| 10000 | $ 0.09 | |||
| 14000 | $ 0.08 | |||
| 20000 | $ 0.08 | |||
| 50000 | $ 0.08 | |||
| 100000 | $ 0.08 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.17 | |
| 100 | $ 0.12 | |||
| 250 | $ 0.09 | |||
| 1000 | $ 0.06 | |||
Description
General part information
SN74HCS595-Q1 Series
The SN74HCS595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.
The SN74HCS595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.
Documents
Technical documentation and resources
