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20-SOIC
Integrated Circuits (ICs)

CY74FCT273TSOCT

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Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT 20-PIN SOIC T/R

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20-SOIC
Integrated Circuits (ICs)

CY74FCT273TSOCT

Active
Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT 20-PIN SOIC T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationCY74FCT273TSOCT
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Current - Quiescent (Iq)200 µA
Input Capacitance5 pF
Max Propagation Delay @ V, Max CL13 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeNon-Inverted
Package / Case20-SOIC
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package20-SOIC
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.00
10$ 0.90
25$ 0.85
100$ 0.70
250$ 0.65
500$ 0.58
1000$ 0.46
Digi-Reel® 1$ 1.00
10$ 0.90
25$ 0.85
100$ 0.70
250$ 0.65
500$ 0.58
1000$ 0.46
Tape & Reel (TR) 2000$ 0.43
6000$ 0.40
10000$ 0.39
Texas InstrumentsLARGE T&R 1$ 0.74
100$ 0.57
250$ 0.42
1000$ 0.30

Description

General part information

CY74FCT273T Series

The CD74FCT273 is a positive-edge-triggered, D-type flip-flop with a direct clear (CLR\) input. This device uses a small-geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCCbounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48 mA.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. All eight flip-flops are controlled by a common clock (CLK) and a common reset (CLR\). The outputs are placed in a low state when CLR\ is taken low, independent of the CLK.

The CD74FCT273 is characterized for operation from 0°C to 70°C.