
AD8582ARZ-REEL
Active+5 VOLT, PARALLEL INPUT COMPLETE DUAL 12-BIT DAC
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AD8582ARZ-REEL
Active+5 VOLT, PARALLEL INPUT COMPLETE DUAL 12-BIT DAC
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | AD8582ARZ-REEL |
|---|---|
| Architecture | R-2R |
| Data Interface | Parallel |
| Differential Output | False |
| INL/DNL (LSB) | 0.75 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 12 bits |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Voltage - Buffered |
| Package / Case | 24-SOIC |
| Package / Case [custom] | 7.5 mm |
| Package / Case [custom] | 0.295 in |
| Reference Type | Internal |
| Settling Time | 16 µs |
| Supplier Device Package | 24-SOIC |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 48.47 | |
| Tape & Reel (TR) | 1000 | $ 31.32 | ||
Description
General part information
AD8582 Series
The AD8582 is a complete, parallel input, dual 12-bit, voltage output DAC designed to operate from a single +5 volt supply. Built using a CBCMOS process, this monolithic DAC offers the user low cost, and ease-of-use in +5 volt only systems.Included on the chip, in addition to the DACs, are a rail-to-rail amplifier, latch and reference. The reference (VREF) is trimmed to 2.5 volts output, and the on-chip amplifier gains up the DAC output to 4.095 volts full scale. The user needs only supply a +5 volt supply.>/p>The AD8582 is coded natural binary. The op amp output swings from 0 volt to +4.095 volts for a one-millivolt-per-bit resolution, and is capable of driving ±5 mA. Operation down to 4.3 V is possible with output load currents less than 1 mA.The high speed parallel data interface connects to the fastest processors without wait states. The double-buffered input structure allows the user to load the input registers one at a time, then a single load strobe tied to both LDA + LDB inputs will update both DAC outputs simultaneously. LDA and LDB can also be activated independently to immediately update their respective DAC registers. An address input decodes DAC A or DAC B when the chip select CS input is strobed. An asynchronous reset input sets the output to zero scale. The MSB bit can be used to establish a preset to midscale when the reset input is strobed.The AD8582 is available in the 24-pin plastic DIP and the surface mount SOIC-24. Each part is fully specified for operation over -40°C to +85°C, and the full +5 V ±5% power supply range.
Documents
Technical documentation and resources