Specification	MC74VHC257DG

Circuit [custom]	4
Circuit [custom]	2:1
Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Independent Circuits	1
Mounting Type	Surface Mount
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	16-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Supplier Device Package	16-SOIC
Type	Multiplexer
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	2 V
Voltage Supply Source	Single Supply

MC74VHC257 Series

Quad 2-Channel Multiplexer with 3-State Outputs

Part	Package / Case	Package / Case [x]	Package / Case [y]	Type	Voltage Supply Source	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Min]	Operating Temperature [Max]	Mounting Type	Circuit [custom]	Circuit [custom]	Independent Circuits	Supplier Device Package
ON Semiconductor MC74VHC257DR2G	16-SOIC	0.154 in	3.9 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-SOIC
ON Semiconductor MC74VHC257DTG	16-TSSOP	0.173 in	4.4 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-TSSOP
ON Semiconductor MC74VHC257DTR2	16-TSSOP	0.173 in	4.4 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-TSSOP
ON Semiconductor MC74VHC257DG	16-SOIC	0.154 in	3.9 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-SOIC

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

MC74VHC257 Series

The MC74VHC257 is an advanced high speed CMOS quad 2-channel multiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.It consists of four 2-input digital multiplexers with common select (S) and enable (OE)bar inputs. When (OE)bar is held High, selection of data is inhibited and all the outputs go Low.The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.