
MC74VHC257DR2G
ActiveIC,LOGIC MUX,QUAD,2-INPUT,AHC/VHC-CMOS,SOP,16PIN,PLASTIC ROHS COMPLIANT: YES

MC74VHC257DR2G
ActiveIC,LOGIC MUX,QUAD,2-INPUT,AHC/VHC-CMOS,SOP,16PIN,PLASTIC ROHS COMPLIANT: YES
Technical Specifications
Parameters and characteristics for this part
| Specification | MC74VHC257DR2G |
|---|---|
| Circuit [custom] | 4 |
| Circuit [custom] | 2:1 |
| Current - Output High, Low [custom] | 8 mA |
| Current - Output High, Low [custom] | 8 mA |
| Independent Circuits | 1 |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Multiplexer |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
| Voltage Supply Source | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.28 | |
| 10 | $ 0.77 | |||
| 25 | $ 0.64 | |||
| 100 | $ 0.50 | |||
| 250 | $ 0.43 | |||
| 500 | $ 0.39 | |||
| 1000 | $ 0.36 | |||
| Digi-Reel® | 1 | $ 0.82 | ||
| 10 | $ 0.72 | |||
| 25 | $ 0.68 | |||
| 100 | $ 0.51 | |||
| 250 | $ 0.44 | |||
| 500 | $ 0.42 | |||
| 1000 | $ 0.32 | |||
| Tape & Reel (TR) | 2500 | $ 0.27 | ||
| 5000 | $ 0.30 | |||
| 7500 | $ 0.28 | |||
| 12500 | $ 0.27 | |||
| Newark | Each (Supplied on Full Reel) | 1 | $ 0.37 | |
| 3000 | $ 0.36 | |||
| 6000 | $ 0.34 | |||
| 12000 | $ 0.31 | |||
| 18000 | $ 0.29 | |||
| 30000 | $ 0.28 | |||
| ON Semiconductor | N/A | 1 | $ 0.29 | |
Description
General part information
MC74VHC257 Series
The MC74VHC257 is an advanced high speed CMOS quad 2-channel multiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.It consists of four 2-input digital multiplexers with common select (S) and enable (OE)bar inputs. When (OE)bar is held High, selection of data is inhibited and all the outputs go Low.The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
Documents
Technical documentation and resources