MC74VHC257 Series

Quad 2-Channel Multiplexer with 3-State Outputs

Catalog

Quad 2-Channel Multiplexer with 3-State Outputs

Part	Package / Case	Package / Case [x]	Package / Case [y]	Type	Voltage Supply Source	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Min]	Operating Temperature [Max]	Mounting Type	Circuit [custom]	Circuit [custom]	Independent Circuits	Supplier Device Package
ON Semiconductor MC74VHC257DR2G	16-SOIC	0.154 in	3.9 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-SOIC
ON Semiconductor MC74VHC257DTG	16-TSSOP	0.173 in	4.4 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-TSSOP
ON Semiconductor MC74VHC257DTR2	16-TSSOP	0.173 in	4.4 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-TSSOP
ON Semiconductor MC74VHC257DG	16-SOIC	0.154 in	3.9 mm	Multiplexer	Single Supply	8 mA	8 mA	5.5 V	2 V	-55 °C	125 °C	Surface Mount	4	2:1	1	16-SOIC

Catalog

Quad 2-Channel Multiplexer with 3-State Outputs

Key Features

• High Speed: tPD= 4.1ns (Typ) at VCC= 5V

• Low Power Dissipation: ICC= 4mA (Max) at TA= 25°C

• High Noise Immunity: VNIH= VNIL= 28% VCC

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Designed for 2V to 5.5V Operating Range

• Low Noise: VOLP= 0.8V (Max)

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

• ESD Performance: HBM > 2000V; Machine Model > 200V

• Chip Complexity: FETs = 100; Equivalent Gates = 25

• These devices are available in Pb-free package(s). Specifications herein apply to both standard and Pb-free devices. Please see our website at www.onsemi.com for specific Pb-free orderable part numbers, or contact your local ON Semiconductor sales office or representative.

Description

The MC74VHC257 is an advanced high speed CMOS quad 2-channel multiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.It consists of four 2-input digital multiplexers with common select (S) and enable (OE)bar inputs. When (OE)bar is held High, selection of data is inhibited and all the outputs go Low.The select decoding determines whether the A or B inputs get routed to the corresponding Y outputs.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.