SN74ABT374ADW
ActiveOCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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SN74ABT374ADW
ActiveOCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT374ADW |
|---|---|
| Clock Frequency | 200 MHz |
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Function | Standard |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 5.1 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 20-SOIC |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Supplier Device Package | 20-SOIC |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
SN74ABT374A Series
Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
| Part | Input Capacitance | Number of Bits per Element | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Trigger Type | Supplier Device Package | Output Type | Max Propagation Delay @ V, Max CL | Operating Temperature [Max] | Operating Temperature [Min] | Package / Case | Mounting Type | Number of Elements | Voltage - Supply [Min] | Voltage - Supply [Max] | Function | Clock Frequency | Type | Package / Case [y] | Package / Case [x] | Package / Case [y] | Package / Case | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-SSOP | Non-Inverted Tri-State | 6.6 ns | 85 °C | -40 °C | 20-SSOP | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | |||||
 Texas Instruments | |||||||||||||||||||||||
 Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-TSSOP | Non-Inverted Tri-State | 6.6 ns | 85 °C | -40 °C | 20-TSSOP | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | 4.4 mm | 0.173 in | |||
Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-SOIC | Non-Inverted Tri-State | 5.1 ns | 85 °C | -40 °C | 20-SOIC | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | 0.295 in | 7.5 mm | |||
Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-TSSOP | Non-Inverted Tri-State | 6.6 ns | 85 °C | -40 °C | 20-TSSOP | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | 4.4 mm | 0.173 in | |||
 Texas Instruments | |||||||||||||||||||||||
 Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-SOIC | Non-Inverted Tri-State | 6.6 ns | 85 °C | -40 °C | 20-SOIC | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | 0.295 in | 7.5 mm | |||
 Texas Instruments | 3.5 pF | 8 | 64 mA | 32 mA | Positive Edge | 20-SO | Non-Inverted Tri-State | 6.6 ns | 85 °C | -40 °C | 20-SOIC | Surface Mount | 1 | 4.5 V | 5.5 V | Standard | 200 MHz | D-Type | 0.209 " | 5.3 mm |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 0.89 | |
| 10 | $ 0.79 | |||
| 25 | $ 0.75 | |||
| 100 | $ 0.62 | |||
| 250 | $ 0.58 | |||
| 500 | $ 0.51 | |||
| 1000 | $ 0.47 | |||
| Texas Instruments | TUBE | 1 | $ 0.93 | |
| 100 | $ 0.72 | |||
| 250 | $ 0.53 | |||
| 1000 | $ 0.38 | |||
Description
General part information
SN74ABT374A Series
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the SN54ABT374 and SN74ABT374A are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
Documents
Technical documentation and resources