
Deep-Dive with AI
Search across all available documentation for this part.

Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVC821ADWE4 |
|---|---|
| Clock Frequency | 150 MHz |
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Iq) | 10 µA |
| Function | Standard |
| Input Capacitance | 5 pF |
| Max Propagation Delay @ V, Max CL | 7.3 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 10 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 24-SOIC |
| Package / Case [custom] | 7.5 mm |
| Package / Case [custom] | 0.295 in |
| Supplier Device Package | 20-SOIC |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 683 | $ 0.44 | |
Description
General part information
SN74LVC821A Series
This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCCoperation.
The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.
Documents
Technical documentation and resources
No documents available