Integrated Circuits (ICs)

SN74LVC821APWR

Active

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsUnderstanding and Interpreting Standard-Logic Data Sheets (Rev. C)Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices +26

Integrated Circuits (ICs)

SN74LVC821APWR

Active

Texas Instruments

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsUnderstanding and Interpreting Standard-Logic Data Sheets (Rev. C)Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices +26

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LVC821APWR

Clock Frequency	150 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Standard
Input Capacitance	5 pF
Max Propagation Delay @ V, Max CL	7.3 ns
Mounting Type	Surface Mount
Number of Bits per Element	10
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	24-TSSOP
Package / Case	0.173 in, 4.4 mm
Supplier Device Package	24-TSSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74LVC821A Series

10-Bit Bus-Interface Flip-Flop With 3-State Outputs

Part	Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Trigger Type	Current - Output High, Low	Output Type	Function	Current - Quiescent (Iq)	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Max Propagation Delay @ V, Max CL	Clock Frequency	Number of Bits per Element	Supplier Device Package	Mounting Type	Input Capacitance	Package / Case	Package / Case [y]	Package / Case [y]	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74LVC821ADBRG4	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-SSOP	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-SSOP	Surface Mount	5 pF
Texas Instruments SN74LVC821APWR	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-TSSOP	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-TSSOP	Surface Mount	5 pF	0.173 in 4.4 mm
Texas Instruments SN74LVC821ADGVR	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-TFSOP	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-TVSOP	Surface Mount	5 pF		4.4 mm	0.173 in
Texas Instruments SN74LVC821ADWR	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-SOIC	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-SOIC	Surface Mount	5 pF				7.5 mm	0.295 in
Texas Instruments SN74LVC821APW	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-TSSOP	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-TSSOP	Surface Mount	5 pF	0.173 in 4.4 mm
Texas Instruments SN74LVC821APWT	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-TSSOP	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-TSSOP	Surface Mount	5 pF	0.173 in 4.4 mm
Texas Instruments SN74LVC821ADW	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-SOIC	85 °C	-40 °C	1	7.3 ns	150 MHz	10	24-SOIC	Surface Mount	5 pF				7.5 mm	0.295 in
Texas Instruments SN74LVC821ADWE4	D-Type	1.65 V	3.6 V	Positive Edge	24 mA	Non-Inverted Tri-State	Standard	10 µA	24-SOIC	85 °C	-40 °C	1	7.3 ns	150 MHz	10	20-SOIC	Surface Mount	5 pF				7.5 mm	0.295 in
Texas Instruments SN74LVC821DW

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.52
	Digi-Reel®	1	$ 1.52
	Tape & Reel (TR)	2000	$ 0.65
		6000	$ 0.61
		10000	$ 0.59
Texas Instruments	LARGE T&R	1	$ 1.13
		100	$ 0.87
		250	$ 0.64
		1000	$ 0.46

Description

General part information

SN74LVC821A Series

This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

Documents

Technical documentation and resources

SN74LVC821APWR

Deep-Dive with AI

SN74LVC821APWR

Deep-Dive with AI

Technical Specifications

SN74LVC821A Series

Pricing

Description

SN74LVC821A Series

Documents

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Implications of Slow or Floating CMOS Inputs (Rev. E)

Live Insertion

TI IBIS File Creation, Validation, and Distribution Processes

Understanding Advanced Bus-Interface Products Design Guide

LVC Characterization Information

Low-Voltage Logic (LVC) Designer's Guide

Signal Switch Data Book (Rev. A)

Little Logic Guide 2018 (Rev. G)

Texas Instruments Little Logic Application Report

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

LOGIC Pocket Data Book (Rev. B)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

How to Select Little Logic (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Standard Linear & Logic for PCs, Servers & Motherboards

Power-Up Behavior of Clocked Devices (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

SN74LVC821A datasheet (Rev. J)

Design Summary for WCSP Little Logic (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

Logic Guide (Rev. AB)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Input and Output Characteristics of Digital Integrated Circuits

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

SN74LVC821A Series