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Integrated Circuits (ICs)

SN74LVC821ADWR

Active
Texas Instruments

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

24-pin (DW) package image
Integrated Circuits (ICs)

SN74LVC821ADWR

Active
Texas Instruments

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC821ADWR
Clock Frequency150 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)10 µA
FunctionStandard
Input Capacitance5 pF
Max Propagation Delay @ V, Max CL7.3 ns
Mounting TypeSurface Mount
Number of Bits per Element10
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case24-SOIC
Package / Case [custom]7.5 mm
Package / Case [custom]0.295 in
Supplier Device Package24-SOIC
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.52
10$ 1.36
25$ 1.29
100$ 1.06
250$ 0.99
500$ 0.88
1000$ 0.69
Digi-Reel® 1$ 1.52
10$ 1.36
25$ 1.29
100$ 1.06
250$ 0.99
500$ 0.88
1000$ 0.69
Tape & Reel (TR) 2000$ 0.65
6000$ 0.61
10000$ 0.59
Texas InstrumentsLARGE T&R 1$ 1.13
100$ 0.87
250$ 0.64
1000$ 0.46

Description

General part information

SN74LVC821A Series

This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

Documents

Technical documentation and resources

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Live Insertion

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

LVC Characterization Information

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Little Logic Guide 2018 (Rev. G)

Selection guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Logic Guide (Rev. AB)

Selection guide

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

How to Select Little Logic (Rev. A)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Texas Instruments Little Logic Application Report

Application note

SN74LVC821A datasheet (Rev. J)

Data sheet

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Signal Switch Data Book (Rev. A)

User guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note