ADS42JB69IRGCT
ActiveDUAL-CHANNEL, 16-BIT, 250-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)
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ADS42JB69IRGCT
ActiveDUAL-CHANNEL, 16-BIT, 250-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS42JB69IRGCT |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | JESD204B |
| Features | Simultaneous Sampling |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 2 |
| Number of Bits | 16 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 64-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 250 M |
| Supplier Device Package | 64-VQFN (9x9) |
| Voltage - Supply, Analog [Max] | 1.9 V |
| Voltage - Supply, Analog [Min] | 1.7 V |
| Voltage - Supply, Digital [Max] | 1.9 V |
| Voltage - Supply, Digital [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 259.70 | |
| 10 | $ 248.73 | |||
| 25 | $ 243.24 | |||
| Digi-Reel® | 1 | $ 259.70 | ||
| 10 | $ 248.73 | |||
| 25 | $ 243.24 | |||
| Tape & Reel (TR) | 250 | $ 234.10 | ||
| Texas Instruments | SMALL T&R | 1 | $ 210.05 | |
| 100 | $ 190.13 | |||
| 250 | $ 184.70 | |||
| 1000 | $ 181.08 | |||
Description
General part information
ADS42JB69 Series
The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS, analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data rates up to3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog inputs up to very high input frequencies. A sampling clock divider allows more flexibility for system clock architecture design. The devices employ internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS, analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data rates up to3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog inputs up to very high input frequencies. A sampling clock divider allows more flexibility for system clock architecture design. The devices employ internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
Documents
Technical documentation and resources