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16-LFCSP-WQ
Integrated Circuits (ICs)

ADCLK914BCPZ-WP

Active
Analog Devices

ULTRAFAST, SIGE, OPEN-COLLECTOR HVDS CLOCK/DATA BUFFER

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsAN-927: Determining if a Spur is Related to the DDS/DAC or to Some Other Source (For Example, Switching Supplies) (Rev.0)AN-741: Little Known Characteristics of Phase Noise (Rev.0)+4
16-LFCSP-WQ
Integrated Circuits (ICs)

ADCLK914BCPZ-WP

Active
Analog Devices

ULTRAFAST, SIGE, OPEN-COLLECTOR HVDS CLOCK/DATA BUFFER

Deep-Dive with AI

DocumentsAN-927: Determining if a Spur is Related to the DDS/DAC or to Some Other Source (For Example, Switching Supplies) (Rev.0)AN-741: Little Known Characteristics of Phase Noise (Rev.0)+4

Technical Specifications

Parameters and characteristics for this part

SpecificationADCLK914BCPZ-WP
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]7.5 GHz
InputLVPECL, CMOS, LVDS, CML, LVTTL
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
OutputHVDS
Ratio - Input:Output [custom]1:1
Supplier Device Package16-LFCSP-VQ (3x3)
TypeBuffer/Driver, Data
Voltage - Supply [Max]3.63 V
Voltage - Supply [Min]2.97 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 21.59
10$ 15.77
25$ 14.28
80$ 12.84
230$ 11.87
440$ 11.53

Description

General part information

ADCLK914 Series

The ADCLK914 is an ultrafast clock/data buffer fabricated on the Analog Devices, Inc., proprietary, complementary bipolar (XFCB-3) silicon-germanium (SiGe) process. The ADCLK914 features high voltage differential signaling (HVDS) outputs suitable for driving the latest Analog Devices high speed digitalto-analog converters (DACs). The ADCLK914 has a single, differential open-collector output.The ADCLK914 buffer operates up to 7.5 GHz with a 160 ps propagation delay and adds only 110 fs random jitter (RJ). The input has a center tapped, 100 Ω, on-chip termination resistor and accepts LVPECL, CML, CMOS, LVTTL, or LVDS (ac-coupled only). A VREFpin is available for biasing ac-coupled inputs.The HVDS output stage is designed to directly drive 1.9 V each side into 50 Ω terminated to VCCfor a total differential output swing of 3.8 V.The ADCLK914 is available in a 16-lead LFCSP. It is specified for operation over the extended industrial temperature range of −40°C to +125°C.ApplicationsClock and data signal restorationHigh speed converter clockingBroadband communicationsCellular infrastructureHigh speed line receiversATE and high performance instrumentationLevel shiftingThreshold detection