
SN74LS374NSR
ActiveFLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOP T/R
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SN74LS374NSR
ActiveFLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LS374NSR |
|---|---|
| Clock Frequency | 50 MHz |
| Current - Output High, Low [custom] | 24 mA |
| Current - Output High, Low [custom] | 2.6 mA |
| Current - Quiescent (Iq) | 40 mA |
| Function | Standard |
| Max Propagation Delay @ V, Max CL | 28 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 20-SOIC |
| Package / Case | 0.209 " |
| Package / Case | 5.3 mm |
| Supplier Device Package | 20-SO |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.25 V |
| Voltage - Supply [Min] | 4.75 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.85 | |
| 10 | $ 1.18 | |||
| 25 | $ 1.00 | |||
| 100 | $ 0.80 | |||
| 250 | $ 0.70 | |||
| 500 | $ 0.64 | |||
| 1000 | $ 0.59 | |||
| Digi-Reel® | 1 | $ 1.85 | ||
| 10 | $ 1.18 | |||
| 25 | $ 1.00 | |||
| 100 | $ 0.80 | |||
| 250 | $ 0.70 | |||
| 500 | $ 0.64 | |||
| 1000 | $ 0.59 | |||
| Tape & Reel (TR) | 2000 | $ 0.45 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.88 | |
| 100 | $ 0.68 | |||
| 250 | $ 0.50 | |||
| 1000 | $ 0.36 | |||
Description
General part information
SN74LS374 Series
These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.
The eight flip-flops of the ’LS374 and ’S374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs.
Documents
Technical documentation and resources