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56-VFQFN
Integrated Circuits (ICs)

LAN9221I-ABZJ

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Microchip Technology

ETHERNET CTLR SINGLE CHIP 10MBPS/100MBPS 1.8V/2.5V/3.3V 56-PIN VQFN EP TRAY

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56-VFQFN
Integrated Circuits (ICs)

LAN9221I-ABZJ

Active
Microchip Technology

ETHERNET CTLR SINGLE CHIP 10MBPS/100MBPS 1.8V/2.5V/3.3V 56-PIN VQFN EP TRAY

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationLAN9221I-ABZJ
FunctionController
InterfaceParallel
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case56-VFQFN Exposed Pad
ProtocolEthernet
Standards10/100 Base-T/TX PHY
Supplier Device Package56-QFN (8x8)
Voltage - Supply3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 1$ 10.44
10$ 10.33
25$ 9.10
100$ 8.69
DigikeyTray 1$ 11.30
25$ 9.40
100$ 8.55
Microchip DirectTRAY 1$ 11.30
25$ 9.40
100$ 8.55
1000$ 8.26
5000$ 8.16
NewarkEach 100$ 8.89

Description

General part information

LAN9221 Series

The LAN9221/LAN9221i is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9221/LAN9221i has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9221/LAN9221i is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The variable voltage I/O signals of the LAN9221/LAN9221i accommodate lower voltage I/O signaling without the need for voltage level shifters.

The LAN9221/LAN9221i includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9221/LAN9221i also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9221/LAN9221i memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity.

The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset.