Zenode.ai Logo
Beta
16 QFN
Integrated Circuits (ICs)

NB4N527SMNR2G

Active
ON Semiconductor

TRANSLATOR, 3.3 V, 2.5 GB/S DUAL ANYLEVEL™ TO LVDS RECEIVER/DRIVER/BUFFER, WITH INTERNAL TERMINATION

Deep-Dive with AI

Search across all available documentation for this part.

16 QFN
Integrated Circuits (ICs)

NB4N527SMNR2G

Active
ON Semiconductor

TRANSLATOR, 3.3 V, 2.5 GB/S DUAL ANYLEVEL™ TO LVDS RECEIVER/DRIVER/BUFFER, WITH INTERNAL TERMINATION

Technical Specifications

Parameters and characteristics for this part

SpecificationNB4N527SMNR2G
Logic TypeReceiver, Translator, Driver, Buffer
Mounting TypeSurface Mount
Number of Bits2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case16-VFQFN Exposed Pad
Supplier Device Package16-QFN (3x3)
Supply Voltage [Max]3.6 V
Supply Voltage [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 13.55
10$ 10.68
25$ 9.96
100$ 9.43
Digi-Reel® 1$ 13.55
10$ 10.68
25$ 9.96
100$ 9.43
Tape & Reel (TR) 3000$ 7.70
NewarkEach (Supplied on Full Reel) 1200$ 7.34

Description

General part information

NB4N527S Series

NB4N527S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevelTMinput signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 2.5 Gb/s or 1.25 GHz, respectively.The NB4N527S has a wide input common mode range of GND+50 mV to VCC-50 mV combined with two 50 Ω internal termination resistors is ideal for translating differential or single-ended data or clock signals to 350 mV typical LVDS output levels without use of any additional external components.The device is offered in a small 3 mm x 3 mm QFN-16 package. NB4N527S is targeted for data, wireless and telecom applications as well as high speed logic interface where jitter and package size are main requirements.