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Texas Instruments-LM5026MT/NOPB PWM and Resonant Controllers Current Mode PWM Controller 3A 590kHz 16-Pin TSSOP Tube
Integrated Circuits (ICs)

CD4043BPWE4

Obsolete
Texas Instruments

LATCH TRANSPARENT 3-ST 4-CH SR-TYPE 16-PIN TSSOP

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Texas Instruments-LM5026MT/NOPB PWM and Resonant Controllers Current Mode PWM Controller 3A 590kHz 16-Pin TSSOP Tube
Integrated Circuits (ICs)

CD4043BPWE4

Obsolete
Texas Instruments

LATCH TRANSPARENT 3-ST 4-CH SR-TYPE 16-PIN TSSOP

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4043BPWE4
Circuit1:1
Current - Output High, Low [custom]6.8 mA
Current - Output High, Low [custom]6.8 mA
Delay Time - Propagation50 ns
Independent Circuits4
Logic TypeS-R Latch
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeTri-State
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Supplier Device Package16-TSSOP
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V

CD4043B Series

CMOS Quad NOR R/S Latch with 3-State Outputs

PartOutput TypeSupplier Device PackageIndependent CircuitsCircuitLogic TypeDelay Time - PropagationPackage / CasePackage / Case [x]Package / Case [y]Operating Temperature [Min]Operating Temperature [Max]Mounting TypeVoltage - Supply [Max]Voltage - Supply [Min]Current - Output High, Low [custom]Current - Output High, Low [custom]Package / CasePackage / Case
16 SOIC
Texas Instruments
CD4043BDRG4
Tri-State
16-SOIC
4
1:1
S-R Latch
50 ns
16-SOIC
0.154 in
3.9 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
PDIP (N)
Texas Instruments
CD4043BE
Tri-State
16-PDIP
4
1:1
S-R Latch
50 ns
16-DIP
-55 °C
125 °C
Through Hole
18 V
3 V
6.8 mA
6.8 mA
0.3 in
7.62 mm
SOIC (DW)
Texas Instruments
CD4043BDWR
Tri-State
16-SOIC
4
1:1
S-R Latch
50 ns
16-SOIC
0.295 in
7.5 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
16-TSSOP
Texas Instruments
CD4043BPW
Tri-State
16-TSSOP
4
1:1
S-R Latch
50 ns
16-TSSOP
0.173 in
4.4 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
16-TSSOP
Texas Instruments
CD4043BPWG4
Tri-State
16-TSSOP
4
1:1
S-R Latch
50 ns
16-TSSOP
0.173 in
4.4 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
16 SOIC
Texas Instruments
CD4043BD
Tri-State
16-SOIC
4
1:1
S-R Latch
50 ns
16-SOIC
0.154 in
3.9 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
Texas Instruments-LM5026MT/NOPB PWM and Resonant Controllers Current Mode PWM Controller 3A 590kHz 16-Pin TSSOP Tube
Texas Instruments
CD4043BPWE4
Tri-State
16-TSSOP
4
1:1
S-R Latch
50 ns
16-TSSOP
0.173 in
4.4 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA
SOIC (D)
Texas Instruments
CD4043BDR
Tri-State
16-SOIC
4
1:1
S-R Latch
50 ns
16-SOIC
0.154 in
3.9 mm
-55 °C
125 °C
Surface Mount
18 V
3 V
6.8 mA
6.8 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$

Description

General part information

CD4043B Series

CD4043B types are quad cross-coupled 3-state CMOS NOR latches and the CD4044B types are quad cross-coupled 3-state CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or high on the ENABLE input connects the latch states to the Q outputs. A logic "0" or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit feature allows common busing of the outputs.

The CD4043B and CD4044B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline package (D, DR, DT, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4043B types are quad cross-coupled 3-state CMOS NOR latches and the CD4044B types are quad cross-coupled 3-state CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or high on the ENABLE input connects the latch states to the Q outputs. A logic "0" or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit feature allows common busing of the outputs.

Documents

Technical documentation and resources

No documents available