Integrated Circuits (ICs)

SN74LVC1G79YZAR

Obsolete

Texas Instruments

IC FF D-TYPE SNGL 1BIT 5DSBGA

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Integrated Circuits (ICs)

SN74LVC1G79YZAR

Obsolete

Texas Instruments

IC FF D-TYPE SNGL 1BIT 5DSBGA

Deep-Dive with AI

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LVC1G79YZAR

Clock Frequency	160 MHz
Current - Output High, Low [x]	32 mA
Current - Output High, Low [y]	32 mA
Current - Quiescent (Iq)	10 µA
Function	Standard
Input Capacitance	4 pF
Max Propagation Delay @ V, Max CL	4.5 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Non-Inverted
Package / Case	DSBGA, 5-XFBGA
Supplier Device Package	5-DSBGA
Supplier Device Package [x]	1.4
Supplier Device Package [y]	0.9
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	1.65 V

SN74LVC1G79-Q1 Series

Automotive Single Positive-Edge-Triggered D-Type Flip-Flop

Part	Number of Elements	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Current - Quiescent (Iq)	Type	Supplier Device Package	Max Propagation Delay @ V, Max CL	Current - Output High, Low [y]	Current - Output High, Low [x]	Input Capacitance	Trigger Type	Output Type	Mounting Type	Number of Bits per Element	Clock Frequency	Function	Qualification	Grade	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments SN74LVC1G79DCKR	1	5-TSSOP SC-70-5 SOT-353	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SC-70-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79DBVT	1	SC-74A SOT-753	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SOT-23-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79QDCKTQ1	1	5-TSSOP SC-70-5 SOT-353	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SC-70-5	5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard	AEC-Q100	Automotive
Texas Instruments SN74LVC1G79DBVR	1	SC-74A SOT-753	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SOT-23-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79DCKRE4	1	5-TSSOP SC-70-5 SOT-353	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SC-70-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79YEPR	1	5-XFBGA DSBGA	-40 °C	85 °C	5.5 V	1.65 V	10 µA	D-Type	5-DSBGA	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard			1.4	0.9
Texas Instruments SN74LVC1G79DBVTG4	1	SC-74A SOT-753	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SOT-23-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79YZAR	1	5-XFBGA DSBGA	-40 °C	85 °C	5.5 V	1.65 V	10 µA	D-Type	5-DSBGA	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard			1.4	0.9
Texas Instruments SN74LVC1G79DCKRG4	1	5-TSSOP SC-70-5 SOT-353	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SC-70-5	4.5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard
Texas Instruments SN74LVC1G79QDCKRQ1	1	5-TSSOP SC-70-5 SOT-353	-40 °C	125 °C	5.5 V	1.65 V	10 µA	D-Type	SC-70-5	5 ns	32 mA	32 mA	4 pF	Positive Edge	Non-Inverted	Surface Mount	1	160 MHz	Standard	AEC-Q100	Automotive

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

SN74LVC1G79-Q1 Series

The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

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Documents

Technical documentation and resources

No documents available