CDCLVD1213RGTR
ActiveLOW JITTER, 1:4 UNIVERSAL-TO-LVDS BUFFER WITH SELECTABLE OUTPUT DIVIDER
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CDCLVD1213RGTR
ActiveLOW JITTER, 1:4 UNIVERSAL-TO-LVDS BUFFER WITH SELECTABLE OUTPUT DIVIDER
Technical Specifications
Parameters and characteristics for this part
| Specification | CDCLVD1213RGTR |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 800 MHz |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS |
| Package / Case | 16-VFQFN Exposed Pad |
| Ratio - Input:Output | 1:4 |
| Supplier Device Package | 16-VQFN (3x3) |
| Type | Divider, Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 2.625 V |
| Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 3000 | $ 4.85 | |
| Texas Instruments | LARGE T&R | 1 | $ 6.80 | |
| 100 | $ 5.54 | |||
| 250 | $ 4.36 | |||
| 1000 | $ 3.70 | |||
Description
General part information
CDCLVD1213 Series
The CDCLVD1213 clock buffer distributes an input clock to 4 pairs of differential LVDS clock outputs with low additive jitter for clock distribution. The input can either be LVDS, LVPECL, or CML.
The CDCLVD1213 contains a high performance divider for one output (QD) which can divide the input clock signal by a factor of 1, 2, or 4.
The CDCLVD1213 is specifically designed for driving 50-Ω transmission lines. The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
Documents
Technical documentation and resources
