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Integrated Circuits (ICs)

SN74LVTH574PW

Active
Texas Instruments

3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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20-pin (PW) package image
Integrated Circuits (ICs)

SN74LVTH574PW

Active
Texas Instruments

3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH574PW
Clock Frequency150 MHz
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Current - Quiescent (Iq)190 çA
FunctionStandard
Input Capacitance3 pF
Max Propagation Delay @ V, Max CL4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case20-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Supplier Device Package20-TSSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

SN74LVTH574-EP Series

Enhanced Product 3.3-V Abt Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

PartMax Propagation Delay @ V, Max CLOutput TypeNumber of ElementsMounting TypeOperating Temperature [Max]Operating Temperature [Min]Trigger TypeCurrent - Quiescent (Iq)Supplier Device PackageCurrent - Output High, Low [custom]Current - Output High, Low [custom]FunctionInput CapacitancePackage / Case [y]Package / CasePackage / Case [x]Clock FrequencyVoltage - Supply [Min]Voltage - Supply [Max]Number of Bits per ElementTypePackage / Case [y]Package / CasePackage / Case
20-pin (PW) package image
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-TSSOP
64 mA
32 mA
Standard
3 pF
4.4 mm
20-TSSOP
0.173 in
150 MHz
2.7 V
3.6 V
8
D-Type
20-SSOP
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-SSOP
64 mA
32 mA
Standard
3 pF
20-SSOP
150 MHz
2.7 V
3.6 V
8
D-Type
20-SSOP
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-SSOP
64 mA
32 mA
Standard
3 pF
20-SSOP
150 MHz
2.7 V
3.6 V
8
D-Type
20-SOIC,DW
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-SOIC
64 mA
32 mA
Standard
3 pF
0.295 in
20-SOIC
150 MHz
2.7 V
3.6 V
8
D-Type
7.5 mm
20-BGA MICROSTAR JUNIOR
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-BGA MICROSTAR JUNIOR (4x3)
64 mA
32 mA
Standard
3 pF
20-VFBGA
150 MHz
2.7 V
3.6 V
8
D-Type
20-TSSOP
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-TSSOP
64 mA
32 mA
Standard
3 pF
4.4 mm
20-TSSOP
0.173 in
150 MHz
2.7 V
3.6 V
8
D-Type
SOIC (DW)
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-SOIC
64 mA
32 mA
Standard
3 pF
0.295 in
20-SOIC
150 MHz
2.7 V
3.6 V
8
D-Type
7.5 mm
20-pin (PW) package image
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-TSSOP
64 mA
32 mA
Standard
3 pF
4.4 mm
20-TSSOP
0.173 in
150 MHz
2.7 V
3.6 V
8
D-Type
20-TSSOP
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-TSSOP
64 mA
32 mA
Standard
3 pF
4.4 mm
20-TSSOP
0.173 in
150 MHz
2.7 V
3.6 V
8
D-Type
20 TSSOP
Texas Instruments
4.5 ns
Non-Inverted
Tri-State
1
Surface Mount
85 °C
-40 °C
Positive Edge
190 çA
20-SO
64 mA
32 mA
Standard
3 pF
20-SOIC
150 MHz
2.7 V
3.6 V
8
D-Type
0.209 "
5.3 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 0.74
10$ 0.66
70$ 0.63
140$ 0.52
280$ 0.48
560$ 0.43
1050$ 0.40
Texas InstrumentsTUBE 1$ 0.78
100$ 0.60
250$ 0.44
1000$ 0.32

Description

General part information

SN74LVTH574-EP Series

These octal flip-flops are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The eight flip-flops of the ’LVTH574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.