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5-DSBGA-YZP
Integrated Circuits (ICs)

SN74AUP1G79YZPR

Obsolete
Texas Instruments

IC FF D-TYPE SNGL 1BIT 5DSBGA

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5-DSBGA-YZP
Integrated Circuits (ICs)

SN74AUP1G79YZPR

Obsolete
Texas Instruments

IC FF D-TYPE SNGL 1BIT 5DSBGA

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74AUP1G79YZPR
Clock Frequency266 MHz
Current - Output High, Low [custom]4 mA
Current - Output High, Low [custom]4 mA
FunctionStandard
Input Capacitance1.5 pF
Max Propagation Delay @ V, Max CL5.8 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeNon-Inverted
Package / CaseDSBGA, 5-XFBGA
Supplier Device Package5-DSBGA
Supplier Device Package [x]1.4
Supplier Device Package [y]0.9
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]0.8 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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Description

General part information

SN74AUP1G79 Series

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a very-low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, thus resulting in an increased battery life. The AUP devices also maintain excellent signal integrity.

The SN74AUP1G79 is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup-time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

No documents available