SN74AUP1G79 Series

Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

Catalog

Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

Part	Clock Frequency	Number of Bits per Element	Function	Voltage - Supply [Min]	Voltage - Supply [Max]	Input Capacitance	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Number of Elements	Type	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Max Propagation Delay @ V, Max CL	Package / Case	Trigger Type	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments SN74AUP1G79DSFR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	6-SON (1x1)	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	6-XFDFN	Positive Edge
Texas Instruments SN74AUP1G79DCKR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	SC-70-5	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	5-TSSOP SC-70-5 SOT-353	Positive Edge
Texas Instruments SN74AUP1G79DCKT	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	SC-70-5	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	5-TSSOP SC-70-5 SOT-353	Positive Edge
Texas Instruments SN74AUP1G79DBVR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	SOT-23-5	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	SC-74A SOT-753	Positive Edge
Texas Instruments SN74AUP1G79YZPR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	5-DSBGA	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	5-XFBGA DSBGA	Positive Edge	1.4	0.9
Texas Instruments SN74AUP1G79DRYR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	6-SON (1.45x1)	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	6-UFDFN	Positive Edge
Texas Instruments SN74AUP1G79DBVRG4	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	SOT-23-5	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	SC-74A SOT-753	Positive Edge
Texas Instruments SN74AUP1G79DPWR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	5-X2SON (0.8x0.8)	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	4-XFDFN Exposed Pad	Positive Edge
Texas Instruments SN74AUP1G79YFPR	266 MHz	1	Standard	0.8 V	3.6 V	1.5 pF	Surface Mount	85 °C	-40 °C	6-DSBGA	1	D-Type	Non-Inverted	4 mA	4 mA	5.8 ns	6-XFBGA DSBGA	Positive Edge

Catalog

Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

Key Features

• Available in the Texas Instruments NanoStar™ PackageLow Static-Power Consumption:ICC= 0.9 µA MaximumLow Dynamic-Power Consumption:Cpd= 3 pF Typical at 3.3 VLow Input Capacitance:Ci= 1.5 pF TypicalLow Noise: Overshoot and Undershoot< 10% of VCCIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input(Vhys= 250 mV Typical at 3.3 V)Wide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Available in the Texas Instruments NanoStar™ PackageLow Static-Power Consumption:ICC= 0.9 µA MaximumLow Dynamic-Power Consumption:Cpd= 3 pF Typical at 3.3 VLow Input Capacitance:Ci= 1.5 pF TypicalLow Noise: Overshoot and Undershoot< 10% of VCCIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input(Vhys= 250 mV Typical at 3.3 V)Wide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)

Description

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a very-low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, thus resulting in an increased battery life. The AUP devices also maintain excellent signal integrity. The SN74AUP1G79 is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup-time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74AUP1G79 device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a very-low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, thus resulting in an increased battery life. The AUP devices also maintain excellent signal integrity. The SN74AUP1G79 is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup-time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74AUP1G79 device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.