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Texas Instruments-BQ29312PWR Battery Management ICs Battery Protection Li-Ion/Li-Pol 0.2mA 25V 24-Pin TSSOP T/R
Integrated Circuits (ICs)

CDC2510BPWR

NRND
Texas Instruments

CLOCK GENERATOR 1CLOCK INPUTS 24-PIN TSSOP T/R

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Texas Instruments-BQ29312PWR Battery Management ICs Battery Protection Li-Ion/Li-Pol 0.2mA 25V 24-Pin TSSOP T/R
Integrated Circuits (ICs)

CDC2510BPWR

NRND
Texas Instruments

CLOCK GENERATOR 1CLOCK INPUTS 24-PIN TSSOP T/R

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationCDC2510BPWR
Differential - Input:OutputFalse
Divider/MultiplierFalse
Frequency - Max [Max]125 MHz
InputClock
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
OutputClock
Package / Case24-TSSOP
Package / Case0.173 in, 4.4 mm
PLLYes with Bypass
Ratio - Input:Output [custom]1:10
Supplier Device Package24-TSSOP
TypePLL Clock Driver
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 2000$ 11.36

Description

General part information

CDC2510C Series

The CDC2510C is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDC2510C operates at VCC= 3.3 V . It also provides integrated series-damping resistors that make it ideal for driving point-to-point loads.

One bank of ten outputs provides ten low-skew, low-jitter copies of CLK. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at CLK. All outputs can be enabled or disabled via a single output enable input. When the G input is high, the outputs switch in phase and frequency with CLK; when the G input is low, the outputs are disabled to the logic-low state.

Unlike many products containing PLLs, the CDC2510C does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost.

Documents

Technical documentation and resources