Specification	CDCLVD110ARHBR

Differential - Input:Output [custom]	True
Differential - Input:Output [custom]	True
Frequency - Max [Max]	1.1 GHz
Input	LVDS
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output	LVDS
Package / Case	32-VFQFN Exposed Pad
Ratio - Input:Output [custom]	10
Ratio - Input:Output [custom]	2
Supplier Device Package	32-VQFN (5x5)
Type	Fanout Buffer (Distribution), Multiplexer
Voltage - Supply [Max]	2.625 V
Voltage - Supply [Min]	2.375 V

CDCLVD110A Series

1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution

Part	Mounting Type	Output	Voltage - Supply [Min]	Voltage - Supply [Max]	Ratio - Input:Output [custom]	Ratio - Input:Output [custom]	Input	Supplier Device Package	Frequency - Max [Max]	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Type	Package / Case
Texas Instruments CDCLVD110VF	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-LQFP (7x7)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-LQFP
Texas Instruments CDCLVD110AVF	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-LQFP (7x7)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-LQFP
Texas Instruments CDCLVD110ARHBRG4	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-VQFN (5x5)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-VFQFN Exposed Pad
Texas Instruments CDCLVD110ARHBR	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-VQFN (5x5)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-VFQFN Exposed Pad
Texas Instruments CDCLVD110AVFRG4	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-LQFP (7x7)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-LQFP
Texas Instruments CDCLVD110ARHBT	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-VQFN (5x5)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-VFQFN Exposed Pad
Texas Instruments CDCLVD110VFRG4	Surface Mount	LVDS	2.375 V	2.625 V	10	2	LVDS	32-LQFP (7x7)	1.1 GHz	1	85 °C	-40 °C	Fanout Buffer (Distribution) Multiplexer	32-LQFP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	3000	$ 6.82
Texas Instruments	LARGE T&R	1	$ 9.05
		100	$ 7.91
		250	$ 6.09
		1000	$ 5.45

Description

General part information

CDCLVD110A Series

The CDCLVD110A clock driver distributes one pair of differential LVDS clock inputs (either CLK0 or CLK1) to 10 pairs of differential clock outputs (Q0 to Q9) with minimum skew for clock distribution. The CDCLVD110A is specifically designed to drive 50-Ω transmission lines.

When the control enable is high (EN = 1), the 10 differential outputs are programmable in that each output can be individually enabled or disabled(3-stated) according to the first 10 bits loaded into the shift register. Once the shift register is loaded, the last bit selects either CLK0 or CLK1 as the clock input. However, when EN = 0, the outputs are not programmable and all outputs are enabled.

The CDCLVD110A has an improved start-up circuit that minimizes enabling time in AC- and DC-coupled systems.

Documents

Technical documentation and resources

CDCLVD110A Programmable Low-Voltage 1:10 LVDS Clock Driver datasheet (Rev. D)

Data sheet