
ADCLK944BCPZ-R7
Active2.5 V/3.3 V, FOUR LVPECL OUTPUTS, SIGE CLOCK FANOUT BUFFER
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ADCLK944BCPZ-R7
Active2.5 V/3.3 V, FOUR LVPECL OUTPUTS, SIGE CLOCK FANOUT BUFFER
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Technical Specifications
Parameters and characteristics for this part
| Specification | ADCLK944BCPZ-R7 |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 7 GHz |
| Input | CML, LVPECL, LVDS, CMOS |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVPECL, ECL |
| Package / Case | 16-WFQFN Exposed Pad, CSP |
| Ratio - Input:Output | 1:4 |
| Supplier Device Package | 16-LFCSP-WQ (3x3) |
| Type | Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 3.63 V |
| Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 11.75 | |
| 10 | $ 8.25 | |||
| 25 | $ 7.35 | |||
| 100 | $ 6.34 | |||
| 250 | $ 5.85 | |||
| 500 | $ 5.55 | |||
| Digi-Reel® | 1 | $ 11.75 | ||
| 10 | $ 8.25 | |||
| 25 | $ 7.35 | |||
| 100 | $ 6.34 | |||
| 250 | $ 5.85 | |||
| 500 | $ 5.55 | |||
| Tape & Reel (TR) | 1500 | $ 5.30 | ||
Description
General part information
ADCLK944 Series
The ADCLK944 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has a differential input equipped with center-tapped, differential, 100 Ω on-chip termination resistors. The input can accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFpin is available for biasing ac-coupled inputs.The ADCLK944 features four full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCCto the positive supply and VEEto ground. For ECL operation, bias VCCto ground and VEEto the negative supply.The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC− 2 V for a total differential output swing of 1.6 V.The ADCLK944 is available in a 16-lead LFCSP and is specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation