Specification	ZL40207LDF1

Differential - Input:Output [custom]	True
Differential - Input:Output [custom]	True
Frequency - Max [Max]	750 MHz
Input	LVCMOS, HCSL, CML, LVDS, LVPECL
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output	LVPECL
Package / Case	32-VFQFN Exposed Pad
Ratio - Input:Output	1:8
Supplier Device Package	32-QFN (5x5)
Type	Fanout Buffer (Distribution)
Voltage - Supply [Max]	3.465 V
Voltage - Supply [Min]	2.375 V

ZL40207 Series

1:8 LVPECL Buffer with Input Termination

Part	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Mounting Type	Type	Operating Temperature [Max]	Operating Temperature [Min]	Input	Number of Circuits	Voltage - Supply [Min]	Voltage - Supply [Max]	Ratio - Input:Output	Package / Case	Output	Frequency - Max [Max]	Supplier Device Package
Microchip Technology ZL40207LDG1			Surface Mount	Fanout Buffer (Distribution)	85 °C	-40 °C	CML HCSL LVCMOS LVDS LVPECL	1	2.375 V	3.465 V	1:8	32-VFQFN Exposed Pad	LVPECL	750 MHz	32-QFN (5x5)
Microchip Technology ZL40207LDF1			Surface Mount	Fanout Buffer (Distribution)	85 °C	-40 °C	CML HCSL LVCMOS LVDS LVPECL	1	2.375 V	3.465 V	1:8	32-VFQFN Exposed Pad	LVPECL	750 MHz	32-QFN (5x5)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	4000	$ 5.51
Microchip Direct	T/R	1	$ 6.84
		25	$ 5.69
		100	$ 5.18
		1000	$ 4.80
		5000	$ 4.54

Description

General part information

ZL40207 Series

The ZL40207 is an LVPECL clock fan out buffer with eight output clock drivers capable of operating at frequencies up to 750MHz.

The ZL40207 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40207 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.

The ZL40207 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

Documents

Technical documentation and resources

ZL40207 Data Sheet

Data Sheets

Power Supply Noise Rejection - Clock Buffers

Application Notes