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PLCC / 44
Integrated Circuits (ICs)

HV5308PJ-B-G-M903

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Microchip Technology

32-CHANNEL S-P CONVERTER W/HIGH VOLTAGE PUSH-PULL OUTPUTS, 80V

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PLCC / 44
Integrated Circuits (ICs)

HV5308PJ-B-G-M903

Active
Microchip Technology

32-CHANNEL S-P CONVERTER W/HIGH VOLTAGE PUSH-PULL OUTPUTS, 80V

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationHV5308PJ-B-G-M903
FunctionSerial to Parallel
Logic TypeShift Register
Mounting TypeSurface Mount
Number of Bits per Element32
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypePush-Pull
Package / Case44-LCC (J-Lead)
Supplier Device Package44-PLCC (16.59x16.59)
Voltage - Supply [Max]13.2 V
Voltage - Supply [Min]10.8 VDC

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 7.13
25$ 5.95
100$ 5.74
Digi-Reel® 1$ 7.13
25$ 5.95
100$ 5.74
Tape & Reel (TR) 500$ 5.74
Microchip DirectT/R 1$ 7.13
25$ 5.95
100$ 5.40
1000$ 5.22
5000$ 5.16

Description

General part information

HV5308 Series

The HV5308B is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities, such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays. The HV5308B consists of a 32-bit shift register, 32 latches, and control logic to enable outputs. Q1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. When viewed from the top of the package, the HV5308B shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operation of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low.

Documents

Technical documentation and resources