
HV5308PG-B-G-M919
ActiveSHIFT REGISTER, HV5308, SERIAL TO PARALLEL, 1 ELEMENT, 32 -BIT, 44 PINS, PQFP
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HV5308PG-B-G-M919
ActiveSHIFT REGISTER, HV5308, SERIAL TO PARALLEL, 1 ELEMENT, 32 -BIT, 44 PINS, PQFP
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Technical Specifications
Parameters and characteristics for this part
| Specification | HV5308PG-B-G-M919 |
|---|---|
| Function | Serial to Parallel |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 32 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Push-Pull |
| Package / Case | 44-QFP |
| Supplier Device Package | 44-PQFP (10x10) |
| Voltage - Supply [Max] | 13.2 V |
| Voltage - Supply [Min] | 10.8 VDC |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 7.67 | |
| 25 | $ 6.38 | |||
| 100 | $ 6.16 | |||
| Digi-Reel® | 1 | $ 7.67 | ||
| 25 | $ 6.38 | |||
| 100 | $ 6.16 | |||
| Tape & Reel (TR) | 500 | $ 6.16 | ||
| Microchip Direct | T/R | 1 | $ 7.67 | |
| 25 | $ 6.38 | |||
| 100 | $ 5.81 | |||
| 1000 | $ 5.61 | |||
| 5000 | $ 5.55 | |||
Description
General part information
HV5308 Series
The HV5308B is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities, such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays. The HV5308B consists of a 32-bit shift register, 32 latches, and control logic to enable outputs. Q1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. When viewed from the top of the package, the HV5308B shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operation of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low.
Documents
Technical documentation and resources