Specification	SN74LVC3G04DCTR

Current - Output High, Low [x]	32 mA
Current - Output High, Low [y]	32 mA
Current - Quiescent (Max) [Max]	10 µA
Input Logic Level - High [Max]	2 V
Input Logic Level - High [Min]	1.7 V
Input Logic Level - Low [Max]	0.8 V
Input Logic Level - Low [Min]	0.7 V
Logic Type	Inverter
Max Propagation Delay @ V, Max CL	3.2 ns
Mounting Type	Surface Mount
Number of Circuits	3
Number of Inputs	3
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Supplier Device Package	SM8
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	1.65 V

SN74LVC3G04 Series

3-ch, 1.65-V to 5.5-V inverters

Part	Number of Inputs	Number of Circuits	Logic Type	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Current - Quiescent (Max) [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Mounting Type	Supplier Device Package	Current - Output High, Low [y]	Current - Output High, Low [x]	Package / Case	Package / Case [y]	Package / Case [y]	Supplier Device Package [y]	Supplier Device Package [x]
Texas Instruments SN74LVC3G04DCT3	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.8 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	SM8	32 mA	32 mA
Texas Instruments SN74LVC3G04DCU6
Texas Instruments SN74LVC3G04YZPR	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	8-DSBGA	32 mA	32 mA	8-XFBGA DSBGA
Texas Instruments SN74LVC3G04DCUR	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount		32 mA	32 mA	8-VFSOP	2.3 mm	0.091 in
Texas Instruments SN74LVC3G04YZAR	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	8-DSBGA (1.9x0.9)	32 mA	32 mA	8-XFBGA DSBGA			0.9	1.9
Texas Instruments SN74LVC3G04DCURE4	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount		32 mA	32 mA	8-VFSOP	2.3 mm	0.091 in
Texas Instruments SN74LVC3G04DCUTG4	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount		32 mA	32 mA	8-VFSOP	2.3 mm	0.091 in
Texas Instruments SN74LVC3G04DCTR	3	3	Inverter	1.7 V	2 V	125 °C	-40 °C	3.2 ns	10 µA	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	SM8	32 mA	32 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.60
		10	$ 0.53
		25	$ 0.50
		100	$ 0.41
		250	$ 0.38
		500	$ 0.32
		1000	$ 0.26
	Digi-Reel®	1	$ 0.60
		10	$ 0.53
		25	$ 0.50
		100	$ 0.41
		250	$ 0.38
		500	$ 0.32
		1000	$ 0.26
	Tape & Reel (TR)	3000	$ 0.23
		6000	$ 0.22
		15000	$ 0.21
		30000	$ 0.20
Texas Instruments	LARGE T&R	1	$ 0.37
		100	$ 0.28
		250	$ 0.21
		1000	$ 0.15

Description

General part information

SN74LVC3G04 Series

This triple inverter is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC3G04 device performs the Boolean function Y =A.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

Live Insertion

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

SN74LVC3G04DCTR

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SN74LVC3G04DCTR

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Technical Specifications

SN74LVC3G04 Series

Pricing

Description

SN74LVC3G04 Series

Documents

Live Insertion

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Standard Linear & Logic for PCs, Servers & Motherboards

Little Logic Guide 2018 (Rev. G)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Signal Switch Data Book (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Texas Instruments Little Logic Application Report

LOGIC Pocket Data Book (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

Input and Output Characteristics of Digital Integrated Circuits

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

How to Select Little Logic (Rev. A)

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Triple Inverter Gate, SN74LVC3G04 datasheet (Rev. L)

Logic Guide (Rev. AB)

LVC Characterization Information

Low-Voltage Logic (LVC) Designer's Guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Design Summary for WCSP Little Logic (Rev. B)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SN74LVC3G04 Series