Specification	SN74ACT373NSR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low	24 mA
Delay Time - Propagation	8.5 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-SOIC
Package / Case	0.209 "
Package / Case	5.3 mm
Supplier Device Package	20-SO
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ACT373-EP Series

Enhanced Product Octal D-Type Transparent Latches With 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Independent Circuits	Supplier Device Package	Output Type	Package / Case [y]	Package / Case	Package / Case [x]	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Logic Type	Circuit [custom]	Circuit [custom]	Delay Time - Propagation	Current - Output High, Low	Package / Case [y]	Package / Case	Package / Case
Texas Instruments SN74ACT373PW	85 °C	-40 °C	1	20-TSSOP	Tri-State	4.4 mm	20-TSSOP	0.173 in	Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	8.5 ns	24 mA
Texas Instruments CD74ACT373M96	125 °C	-55 °C	1	20-SOIC	Tri-State	0.295 in	20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	3 ns	24 mA	7.5 mm
Texas Instruments SN74ACT373NSR	85 °C	-40 °C	1	20-SO	Tri-State		20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	8.5 ns	24 mA		0.209 "	5.3 mm
Texas Instruments SN74ACT373DW	85 °C	-40 °C	1	20-SOIC	Tri-State	0.295 in	20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	8.5 ns	24 mA	7.5 mm
Texas Instruments CD74ACT373M96E4	125 °C	-55 °C	1	20-SOIC	Tri-State	0.295 in	20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	3 ns	24 mA	7.5 mm
Texas Instruments CD74ACT373E	125 °C	-55 °C	1	20-PDIP	Tri-State		20-DIP		Through Hole	4.5 V	5.5 V	D-Type Transparent Latch	8	8	3 ns	24 mA		0.3 in	7.62 mm
Texas Instruments CD74ACT373M	125 °C	-55 °C	1	20-SOIC	Tri-State	0.295 in	20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	3 ns	24 mA	7.5 mm
Texas Instruments CD74ACT373EG4	125 °C	-55 °C	1	20-PDIP	Tri-State		20-DIP		Through Hole	4.5 V	5.5 V	D-Type Transparent Latch	8	8	3 ns	24 mA		0.3 in	7.62 mm
Texas Instruments SN74ACT373MDWREP	125 °C	-55 °C	1	20-SOIC	Tri-State	0.295 in	20-SOIC		Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	8.5 ns	24 mA	7.5 mm
Texas Instruments SN74ACT373PWR	85 °C	-40 °C	1	20-TSSOP	Tri-State	4.4 mm	20-TSSOP	0.173 in	Surface Mount	4.5 V	5.5 V	D-Type Transparent Latch	8	8	8.5 ns	24 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.36
		10	$ 1.22
		25	$ 1.16
		100	$ 0.95
		250	$ 0.89
		500	$ 0.78
		1000	$ 0.62
	Digi-Reel®	1	$ 1.36
		10	$ 1.22
		25	$ 1.16
		100	$ 0.95
		250	$ 0.89
		500	$ 0.78
		1000	$ 0.62
	Tape & Reel (TR)	2000	$ 0.58
		6000	$ 0.55
		10000	$ 0.53
Texas Instruments	LARGE T&R	1	$ 1.10
		100	$ 0.85
		250	$ 0.62
		1000	$ 0.45

Description

General part information

SN74ACT373-EP Series

This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches are D-type transparent latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pullup components.