
SN74LV08ARGYR
Active4-CH, 2-INPUT 2-V TO 5.5-V HIGH-SPEED (7 NS) AND GATE
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SN74LV08ARGYR
Active4-CH, 2-INPUT 2-V TO 5.5-V HIGH-SPEED (7 NS) AND GATE
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV08ARGYR |
|---|---|
| Current - Output High, Low [custom] | 12 mA |
| Current - Output High, Low [custom] | 12 mA |
| Current - Quiescent (Max) [Max] | 20 µA |
| Input Logic Level - High | 1.5 V |
| Input Logic Level - Low | 0.5 V |
| Logic Type | AND Gate |
| Max Propagation Delay @ V, Max CL | 7.9 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 14-VFQFN Exposed Pad |
| Supplier Device Package | 14-VQFN (3.5x3.5) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.52 | |
| 10 | $ 0.44 | |||
| 25 | $ 0.41 | |||
| 100 | $ 0.33 | |||
| 250 | $ 0.31 | |||
| 500 | $ 0.26 | |||
| 1000 | $ 0.20 | |||
| Digi-Reel® | 1 | $ 0.52 | ||
| 10 | $ 0.44 | |||
| 25 | $ 0.41 | |||
| 100 | $ 0.33 | |||
| 250 | $ 0.31 | |||
| 500 | $ 0.26 | |||
| 1000 | $ 0.20 | |||
| Tape & Reel (TR) | 3000 | $ 0.18 | ||
| 6000 | $ 0.17 | |||
| 15000 | $ 0.16 | |||
| 30000 | $ 0.15 | |||
| LCSC | Piece | 1 | $ 0.42 | |
| 200 | $ 0.16 | |||
| 500 | $ 0.16 | |||
| 1000 | $ 0.15 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.32 | |
| 100 | $ 0.22 | |||
| 250 | $ 0.17 | |||
| 1000 | $ 0.11 | |||
Description
General part information
SN74LV08A-EP Series
This quadruple 2-input positive-AND gate is designed for 2-V to 5.5-V VCCoperation.
The SN74LV08A-EP performs the Boolean function Y = A • B or Y = (A\ + B\)\ in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Documents
Technical documentation and resources