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49 CSPBGA
Integrated Circuits (ICs)

AD4080BBCZ

Active
Analog Devices

20-BIT, 40 MSPS, DIFFERENTIAL SAR ADC

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49 CSPBGA
Integrated Circuits (ICs)

AD4080BBCZ

Active
Analog Devices

20-BIT, 40 MSPS, DIFFERENTIAL SAR ADC

Technical Specifications

Parameters and characteristics for this part

SpecificationAD4080BBCZ
ArchitectureSAR
ConfigurationADC
Data InterfaceSPI, LVDS
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits20
Number of Inputs1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case49-LFBGA, CSPBGA
Ratio - S/H:ADC0:1
Reference TypeExternal
Sampling Rate (Per Second)40M
Supplier Device Package49-CSPBGA
Voltage - Supply, Analog [Max]1.155 V, 3.465 V
Voltage - Supply, Analog [Min]3.135 V, 1.045 V
Voltage - Supply, Digital [Max]1.155 V, 3.465 V
Voltage - Supply, Digital [Min]1.045 V, 3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 84.32
10$ 67.16
25$ 62.78
80$ 60.86

Description

General part information

AD4080 Series

The AD4080 is a high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Maintaining high performance (signal-to-noise and distortion (SINAD) ratio > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to service a wide variety of precision, wide bandwidth data acquisition applications. Simplification of the input anti-alias filter design can be accomplished by applying oversampling along with the integrated digital filtering and decimation to reduce noise and lower the output data rate for applications that do not require the lowest latency of the AD4080.The AD4080 Easy Drive features reduce both signal chain complexity and power consumption while enabling greater channel density and flexibility in companion component selection. The product input structure was designed to minimize any input dependent signal currents; therefore, reducing any converter induced settling artifacts. The continuous acquisition architecture allows settling across the entire conversion cycle, easing ADC driver settling and bandwidth requirements as compared to other high-speed data converters.The AD4080 includes several elements that simplify data converter integration: a low drift reference buffer, low dropout (LDO) regulators to generate ADC core and digital interface supply rails, and a 16K result data first-in first out (FIFO) that can greatly reduce the load on the digital host. Additionally, critical supply and reference decoupling capacitors are integrated in the package to ensure optimum performance, simplify printed circuit board (PCB) layout, and reduce the overall solution footprint.APPLICATIONSDigital imagingCell analysisSpectroscopyAutomated test equipmentHigh speed data acquisitionDigital control loops, hardware in the loopPower quality analysisSource measurement unitsElectron and x-ray microscopyRadar level measurementNondestructive testPredictive maintenance and structural health