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Integrated Circuits (ICs)

TLV5632IPW

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Texas Instruments

8-BIT 8-CH. 1/3 US DAC, SER. INPUT, PGRMABLE SETTLING TIME/POWER CONSUMP, LOW POWER, PWRDN, INT REF

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20-pin (PW) package image
Integrated Circuits (ICs)

TLV5632IPW

Active
Texas Instruments

8-BIT 8-CH. 1/3 US DAC, SER. INPUT, PGRMABLE SETTLING TIME/POWER CONSUMP, LOW POWER, PWRDN, INT REF

Technical Specifications

Parameters and characteristics for this part

SpecificationTLV5632IPW
ArchitectureString DAC
Data InterfaceSPI
Differential OutputFalse
INL/DNL (LSB)0.1 LSB, 0.3 LSB
Mounting TypeSurface Mount
Number of Bits8
Number of D/A Converters8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeVoltage - Buffered
Package / Case20-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Reference TypeExternal, Internal
Settling Time7 µs
Supplier Device Package20-TSSOP
Voltage - Supply, Analog5 V
Voltage - Supply, Analog [Max]3.3 V
Voltage - Supply, Analog [Min]2.7 V
Voltage - Supply, Digital5 V
Voltage - Supply, Digital [Max]3.3 V
Voltage - Supply, Digital [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 70$ 9.50
140$ 8.37
350$ 7.96
490$ 7.45
Texas InstrumentsTUBE 1$ 9.36
100$ 7.63
250$ 6.00
1000$ 5.09

Description

General part information

TLV5632 Series

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, anLDACinput for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.