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40-QFN
Integrated Circuits (ICs)

HMC836LP6CETR

Obsolete
Analog Devices

FRACTIONAL-N PLL WITH INTEGRATED VCO SMT, 3365 - 3705 MHZ

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40-QFN
Integrated Circuits (ICs)

HMC836LP6CETR

Obsolete
Analog Devices

FRACTIONAL-N PLL WITH INTEGRATED VCO SMT, 3365 - 3705 MHZ

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationHMC836LP6CETR
Differential - Input:OutputFalse
Frequency - Max [Max]3.705 GHz
InputClock
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputClock
Package / Case40-VFQFN Exposed Pad
PLLTrue
Ratio - Input:Output [custom]1:1
Supplier Device Package40-QFN (6x6)
Voltage - Supply [Max]5.2 V
Voltage - Supply [Min]3 V

Pricing

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Description

General part information

HMC836 Series

The HMC836LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) with an Integrated Voltage Controlled Oscillator (VCO). The PLL consists of an integrated low noise VCO with x2 output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional PLL features an advanced delta-sigma modulator design that allows both fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonicsFor theory of operation and register map refer to the "PLLs with Integrated VCO - RF VCOs" Operating Guide.APPLICATIONSCellular/4G InfrastructureRepeaters and FemtocellsCommunications Test EquipmentCATV EquipmentPhased Array ApplicationsDDS ReplacementVery High Data Rate Radios

Documents

Technical documentation and resources