Catalog
Fractional-N PLL with Integrated VCO SMT, 3365 - 3705 MHz
Key Features
• RF Bandwidth: 3365 to 3705 MHz
• Ultra Low Phase Noise -98 dBc/Hz in Band Typ
• Figure of Merit (FOM) -227 dBc
• < 180 fs rms Jitter (Integrated 100 Hz to 100 MHz SSB)
• 24-bit Frequency Step Size, Resolution 3 Hz typ
• Exact Frequency Mode
• Built-in Digital Self Test
• 40 Lead 6x6 mm SMT Package: 36 mm2
Description
AI
The HMC836LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) with an Integrated Voltage Controlled Oscillator (VCO). The PLL consists of an integrated low noise VCO with x2 output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional PLL features an advanced delta-sigma modulator design that allows both fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonicsFor theory of operation and register map refer to the "PLLs with Integrated VCO - RF VCOs" Operating Guide.APPLICATIONSCellular/4G InfrastructureRepeaters and FemtocellsCommunications Test EquipmentCATV EquipmentPhased Array ApplicationsDDS ReplacementVery High Data Rate Radios
