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Technical Specifications
Parameters and characteristics for this part
| Specification | CD4001UBM96 |
|---|---|
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Quiescent (Max) [Max] | 1 çA |
| Input Logic Level - High [Max] | 12.5 V |
| Input Logic Level - High [Min] | 4 V |
| Input Logic Level - Low [Max] | 2.5 V |
| Input Logic Level - Low [Min] | 1 V |
| Logic Type | NOR Gate |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.63 | |
| 10 | $ 0.54 | |||
| 25 | $ 0.51 | |||
| 100 | $ 0.40 | |||
| 250 | $ 0.38 | |||
| 500 | $ 0.32 | |||
| 1000 | $ 0.25 | |||
| Digi-Reel® | 1 | $ 0.63 | ||
| 10 | $ 0.54 | |||
| 25 | $ 0.51 | |||
| 100 | $ 0.40 | |||
| 250 | $ 0.38 | |||
| 500 | $ 0.32 | |||
| 1000 | $ 0.25 | |||
| Tape & Reel (TR) | 2500 | $ 0.22 | ||
| 5000 | $ 0.21 | |||
| 7500 | $ 0.22 | |||
| 12500 | $ 0.19 | |||
| 17500 | $ 0.21 | |||
| 25000 | $ 0.18 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.45 | |
| 100 | $ 0.31 | |||
| 250 | $ 0.24 | |||
| 1000 | $ 0.16 | |||
Description
General part information
CD4001UB-MIL Series
CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
Documents
Technical documentation and resources
