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Texas Instruments-SN65HVD1792TDEP Bus Line Transceivers Single Transmitter/Receiver RS-422/RS-485 14-Pin SOIC Tube
Integrated Circuits (ICs)

CD4001UBMT

Unknown
Texas Instruments

NOR GATE 4-ELEMENT 2-IN CMOS 14-PIN SOIC T/R

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Texas Instruments-SN65HVD1792TDEP Bus Line Transceivers Single Transmitter/Receiver RS-422/RS-485 14-Pin SOIC Tube
Integrated Circuits (ICs)

CD4001UBMT

Unknown
Texas Instruments

NOR GATE 4-ELEMENT 2-IN CMOS 14-PIN SOIC T/R

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4001UBMT
Current - Output High, Low [custom]3.4 mA
Current - Output High, Low [custom]3.4 mA
Current - Quiescent (Max) [Max]1 çA
Input Logic Level - High [Max]12.5 V
Input Logic Level - High [Min]4 V
Input Logic Level - Low [Max]2.5 V
Input Logic Level - Low [Min]1 V
Logic TypeNOR Gate
Mounting TypeSurface Mount
Number of Circuits4
Number of Inputs2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case14-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 1250$ 0.39
2500$ 0.35
6250$ 0.33
12500$ 0.32
25000$ 0.30

Description

General part information

CD4001UB-MIL Series

CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

Documents

Technical documentation and resources

No documents available