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SOIC (D)
Integrated Circuits (ICs)

CD4044BDR

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Texas Instruments

LATCH TRANSPARENT 3-ST 4-CH SR-TYPE 16-PIN SOIC T/R

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SOIC (D)
Integrated Circuits (ICs)

CD4044BDR

Active
Texas Instruments

LATCH TRANSPARENT 3-ST 4-CH SR-TYPE 16-PIN SOIC T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4044BDR
Circuit1:1
Current - Output High, Low [custom]6.8 mA
Current - Output High, Low [custom]6.8 mA
Delay Time - Propagation50 ns
Independent Circuits4
Logic TypeS-R Latch
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeTri-State
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 2500$ 0.13
DigikeyCut Tape (CT) 1$ 0.42
10$ 0.36
25$ 0.34
100$ 0.27
250$ 0.25
500$ 0.21
1000$ 0.16
Digi-Reel® 1$ 0.42
10$ 0.36
25$ 0.34
100$ 0.27
250$ 0.25
500$ 0.21
1000$ 0.16
Tape & Reel (TR) 2500$ 0.15
5000$ 0.14
12500$ 0.13
25000$ 0.12
62500$ 0.12
Texas InstrumentsLARGE T&R 1$ 0.27
100$ 0.18
250$ 0.14
1000$ 0.09

Description

General part information

CD4044B Series

CD4043B types are quad cross-coupled 3-state CMOS NOR latches and the CD4044B types are quad cross-coupled 3-state CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or high on the ENABLE input connects the latch states to the Q outputs. A logic "0" or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit feature allows common busing of the outputs.

The CD4043B and CD4044B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline package (D, DR, DT, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4043B types are quad cross-coupled 3-state CMOS NOR latches and the CD4044B types are quad cross-coupled 3-state CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or high on the ENABLE input connects the latch states to the Q outputs. A logic "0" or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit feature allows common busing of the outputs.