
AD9163BBCZRL
Active16-BIT, 12 GSPS, RF DAC AND DIGITAL UPCONVERTER
Deep-Dive with AI
Search across all available documentation for this part.

AD9163BBCZRL
Active16-BIT, 12 GSPS, RF DAC AND DIGITAL UPCONVERTER
Technical Specifications
Parameters and characteristics for this part
| Specification | AD9163BBCZRL |
|---|---|
| Architecture | Quad-Switch |
| Data Interface | JESD204B |
| Differential Output | False |
| INL/DNL (LSB) | 2.7 LSB, 1.7 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 16 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Current - Unbuffered |
| Package / Case | 169-VFBGA, CSPBGA |
| Reference Type | External, Internal |
| Supplier Device Package | 169-CSPBGA (11x11) |
| Voltage - Supply, Analog [Max] | 2.625 V, 1.326 V |
| Voltage - Supply, Analog [Min] | 2.375 V, 1.14 V |
| Voltage - Supply, Digital [Max] | 1.326 V |
| Voltage - Supply, Digital [Min] | 1.14 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 1500 | $ 153.90 | |
Description
General part information
AD9163 Series
The AD91631is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes this DAC ideally suited for the most demanding high speed radio frequency (RF) DAC applications.Superior RF performance and deep interpolation rates enable use of the AD9163 in many wireless infrastructure applications, including MC-GSM, W-CDMA, LTE, and LTE-A.The wide bandwidth of up to 1 GHz and the complex NCO and digital upconverter enable dual band and triple band direct RF synthesis of wireless infrastructure signals, eliminating costly analog upconverters.Wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to 1 GHz of signal bandwidth, making it ideal for cable multiple dwelling unit (MDU) applications. A 2× interpolator filter (FIR85) enables the AD9163 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™operation, the AD9163 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9163 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) configures the AD9163 and monitors the status of all the registers. The AD9163 is offered in a 169-ball, 11 mm × 11 mm, 0.8 mm pitch CSP_BGA package.Product HighlightsHigh dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz.Up to eight lanes JESD204B SERDES interface, flexible in terms of number of lanes and lane speed.Bandwidth and dynamic range to meet multiband wireless communications standards with margin.ApplicationsBroadband communications systemsDOCSIS 3.1 cable modem termination system (CMTS)/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM)Wireless communications infrastructureMC-GSM, W-CDMA, LTE, LTE-A, point to point
Documents
Technical documentation and resources