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SN74F574N

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Texas Instruments

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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PDIP (N)
Integrated Circuits (ICs)

SN74F574N

Active
Texas Instruments

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74F574N
Clock Frequency100 MHz
Current - Output High, Low [custom]3 mA
Current - Output High, Low [custom]24 mA
FunctionStandard
Max Propagation Delay @ V, Max CL8.5 ns
Mounting TypeThrough Hole
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeTri-State, Non-Inverted
Package / Case20-DIP
Package / Case7.62 mm
Package / Case0.3 in
Supplier Device Package20-PDIP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 0.63
20$ 0.57
40$ 0.54
100$ 0.44
260$ 0.41
500$ 0.36
1000$ 0.34
Texas InstrumentsTUBE 1$ 0.86
100$ 0.67
250$ 0.49
1000$ 0.35

Description

General part information

SN74F574 Series

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enableinput can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.