Specification	SN74LVC00AMPWREP

Current - Output High, Low	24 mA
Current - Quiescent (Max) [Max]	10 µA
Input Logic Level - Low	0.8 V
Logic Type	NAND Gate
Max Propagation Delay @ V, Max CL	4.3 ns
Mounting Type	Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2 V

SN74LVC00A-EP Series

Automotive four-channel, two-input, 1.1V to 3.6V NAND gates

Part	Number of Inputs	Current - Quiescent (Max) [Max]	Number of Circuits	Logic Type	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Supplier Device Package	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Current - Output High, Low	Package / Case	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Package / Case [custom]	Package / Case [custom]	Package / Case [x]	Package / Case [y]	Input Logic Level - Low	Qualification	Grade
Texas Instruments SN74LVC00ADBRG4	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns	14-SSOP	0.8 V	0.7 V	24 mA	5.3 mm	14-SSOP	0.209 "	1.65 V	3.6 V	Surface Mount
Texas Instruments SN74LVC00ADB
Texas Instruments SN74LVC00APWG4	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns	14-TSSOP	0.8 V	0.7 V	24 mA		14-TSSOP		1.65 V	3.6 V	Surface Mount	0.173 "	4.4 mm
Texas Instruments SN74LVC00APWR	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns	14-TSSOP	0.8 V	0.7 V	24 mA		14-TSSOP		1.65 V	3.6 V	Surface Mount	0.173 "	4.4 mm
Texas Instruments SN74LVC00AD	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns		0.8 V	0.7 V	24 mA		14-SOIC		1.65 V	3.6 V	Surface Mount			0.154 in	3.9 mm
Texas Instruments SN74LVC00AMPWREP	2	10 µA	4	NAND Gate			125 °C	-55 °C	4.3 ns	14-TSSOP			24 mA		14-TSSOP		2 V	3.6 V	Surface Mount	0.173 "	4.4 mm			0.8 V
Texas Instruments SN74LVC00AWBQARQ1	2	10 µA	4	NAND Gate			125 °C	-40 °C	4.3 ns	14-WQFN (3x2.5)			24 mA		14-WFDFN Exposed Pad		2 V	3.6 V	Surface Mount Wettable Flank					0.8 V	AEC-Q100	Automotive
Texas Instruments SN74LVC00ANS
Texas Instruments SN74LVC00ADRE4	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns		0.8 V	0.7 V	24 mA		14-SOIC		1.65 V	3.6 V	Surface Mount			0.154 in	3.9 mm
Texas Instruments SN74LVC00ADRG4	2	1 çA	4	NAND Gate	1.7 V	2 V	125 °C	-40 °C	4.1 ns		0.8 V	0.7 V	24 mA		14-SOIC		1.65 V	3.6 V	Surface Mount			0.154 in	3.9 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.94
		10	$ 1.74
		25	$ 1.64
		100	$ 1.40
		250	$ 1.31
		500	$ 1.15
		1000	$ 0.95
	Digi-Reel®	1	$ 1.94
		10	$ 1.74
		25	$ 1.64
		100	$ 1.40
		250	$ 1.31
		500	$ 1.15
		1000	$ 0.95
	Tape & Reel (TR)	2000	$ 0.89
		6000	$ 0.85
		10000	$ 0.82
Texas Instruments	LARGE T&R	1	$ 1.68
		100	$ 1.38
		250	$ 0.99
		1000	$ 0.75

Description

General part information

SN74LVC00A-EP Series

The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC00A devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

Documents

Technical documentation and resources

SN74LVC00AMPWREP

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SN74LVC00AMPWREP

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Technical Specifications

SN74LVC00A-EP Series

Pricing

Description

SN74LVC00A-EP Series

Documents

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Logic Guide (Rev. AB)

Input and Output Characteristics of Digital Integrated Circuits

Standard Linear & Logic for PCs, Servers & Motherboards

LOGIC Pocket Data Book (Rev. B)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

How to Select Little Logic (Rev. A)

Little Logic Guide 2018 (Rev. G)

Design Summary for WCSP Little Logic (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

LVC Characterization Information

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

SN74LVC00A-EP datasheet (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

Low-Voltage Logic (LVC) Designer's Guide

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Texas Instruments Little Logic Application Report

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Understanding Advanced Bus-Interface Products Design Guide

Signal Switch Data Book (Rev. A)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Live Insertion

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN74LVC00A-EP Series