
AD5343BRUZ
Active+2.5V TO 5.5V, 230ΜA DUAL RAIL-TO-RAIL VOLTAGE OUTPUT 12-BIT DAC WITH BYTE-LOAD PARALLEL INTERFACE IN 20-LEAD TSSOP
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AD5343BRUZ
Active+2.5V TO 5.5V, 230ΜA DUAL RAIL-TO-RAIL VOLTAGE OUTPUT 12-BIT DAC WITH BYTE-LOAD PARALLEL INTERFACE IN 20-LEAD TSSOP
Technical Specifications
Parameters and characteristics for this part
| Specification | AD5343BRUZ |
|---|---|
| Architecture | String DAC |
| Data Interface | Parallel |
| Differential Output | No |
| DNL (LSB) Tolerance | 0.2 LSB |
| INL (LSB) Tolerance | 2 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 12 bits |
| Number of D/A Converters | 2 count |
| Operating Temperature (Max) | 105 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Voltage - Buffered |
| Package Length | 0.173 in |
| Package Name | 20-TSSOP |
| Package Width | 4.4 mm |
| Reference Type | External |
| Settling Time | 10 µs |
| Voltage - Supply, Analog (Max) | 5.5 V |
| Voltage - Supply, Analog (Min) | 2.5 V |
| Voltage - Supply, Digital (Max) | 5.5 V |
| Voltage - Supply, Digital (Min) | 2.5 V |
Pricing
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Description
General part information
AD5343 Series
AD5343 is a dual DAC. This operates from a 2.5V to 5.5V supply consuming just 230µA at 3V, and feature a power-down pin, PD that further reduces the current to 80nA. Active-low CS selects the device and data is loaded into the input registers on the rising edge of active-low WR. Input data to the DAC is double-buffered, allowing simultaneous update of multiple DACs in a system using the active-low LDAC pin. An asynchronous active-low CLR input is also provided, which resets the contents of the Input Register and the DAC register to all zeros. This device also incorporate a power-on reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. Typical applications are portable battery-powered instruments, digital gain and offset adjustment, programmable voltage and current sources, programmable attenuators, industrial process control.
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