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16-SSOP
Integrated Circuits (ICs)

SN74AHC595DBR

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Texas Instruments

SHIFT REGISTER SINGLE 8-BIT SERIAL TO SERIAL/PARALLEL 16-PIN SSOP T/R

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16-SSOP
Integrated Circuits (ICs)

SN74AHC595DBR

Active
Texas Instruments

SHIFT REGISTER SINGLE 8-BIT SERIAL TO SERIAL/PARALLEL 16-PIN SSOP T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74AHC595DBR
FunctionSerial to Parallel, Serial
Logic TypeShift Register
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State
Package / Case16-SSOP
Package / Case [custom]0.209 in
Package / Case [custom]5.3 mm
Supplier Device Package16-SSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 5$ 0.40
DigikeyCut Tape (CT) 1$ 0.64
10$ 0.55
25$ 0.51
100$ 0.41
250$ 0.38
500$ 0.32
1000$ 0.25
Digi-Reel® 1$ 0.64
10$ 0.55
25$ 0.51
100$ 0.41
250$ 0.38
500$ 0.32
1000$ 0.25
Tape & Reel (TR) 2000$ 0.14
Texas InstrumentsLARGE T&R 1$ 0.33
100$ 0.22
250$ 0.17
1000$ 0.12

Description

General part information

SN74AHC595-Q1 Series

The SN74AHC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.

The SN74AHC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.