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CD4541BNSR

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Texas Instruments

CMOS PROGRAMMABLE TIMER - HIGH VOLTAGE TYPE (20V RATING)

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SOP (NS)
Integrated Circuits (ICs)

CD4541BNSR

Active
Texas Instruments

CMOS PROGRAMMABLE TIMER - HIGH VOLTAGE TYPE (20V RATING)

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4541BNSR
Count65536
Frequency100 kHz
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case14-SOIC
Package / Case [x]0.209 "
Package / Case [y]5.3 mm
Supplier Device Package14-SO
TypeProgrammable Timer
Voltage - Supply [Max]20 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.91
10$ 0.80
25$ 0.75
100$ 0.61
250$ 0.57
500$ 0.48
1000$ 0.39
Digi-Reel® 1$ 0.91
10$ 0.80
25$ 0.75
100$ 0.61
250$ 0.57
500$ 0.48
1000$ 0.39
Tape & Reel (TR) 2000$ 0.35
6000$ 0.33
10000$ 0.31
Texas InstrumentsLARGE T&R 1$ 0.60
100$ 0.41
250$ 0.32
1000$ 0.21

Description

General part information

CD4541B Series

CD4541B programmable timer consists of a 16-stage binary counter, an oscillator that is controlled by external R-C components (2 resistors and a capacitor), an automatic power-on reset circuit, and output control logic. The counter increments on positive-edge clock transitions and can also be reset via the MASTER RESET input.

The output from this timer is the Q or Q\ output from the 8th, 10th, 13th, or 16th counter stage. The desired stage is chosen using time-select inputs A and B (see Frequency Select Table).

The output is available in either of two modes selectable via the MODE input, pin 10 (see Truth Table). When this MODE input is a logic "1", the output will be a continuous square wave having a frequency equal to the oscillator frequency divided by 2N. With the MODE input set to logic "0" and after a MASTER RESET is initiated, the output (assuming Q output has been selected) changes from a low to a high state after 2N-1counts and remains in that state until another MASTER RESET pulse is applied or the MODE input is set to a logic "1".