
Deep-Dive with AI
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Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | EVAL-ADV7180LQEBZ |
|---|---|
| Contents | Board(s) |
| Embedded | False |
| Function | SDTV Video Decoder - NTSC, PAL, SECAM |
| Primary Attributes | Y/C, YPrPb, CVBS |
| Secondary Attributes | 8-Bit ITU-R BT.656 YCrCb 4:2:2 Output |
| Supplied Contents | Board(s) |
| Type | Video |
| Utilized IC / Part | ADV7180 |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Box | 1 | $ 197.84 | |
Description
General part information
ADV7180 Series
The ADV7180 automatically detects and converts standard analog baseband television signals compatible with worldwide NTSC, PAL, and SECAM standards into 4:2:2 component video data compatible with the 8-bit ITU-R BT.656 interface standard.The simple digital output interface connects gluelessly to a wide range of MPEG encoders, codecs, mobile video processors, and Analog Devices, Inc., digital video encoders, such as theADV7391. External HS, VS, and FIELD signals provide timing references for LCD controllers and other video ASICs, if required. Accurate 10-bit analog-to-digital conversion provides professional quality video performance for consumer applications with true 8-bit data resolution. Three analog video input channels accept standard composite, S-video, or component video signals, supporting a wide range of consumer video sources. AGC and clamp-restore circuitry allow an input video signal peak-to-peak range to 1.0 V. Alternatively, these can be bypassed for manual settings.The line-locked clock output allows the output data rate, timing signals, and output clock signals to be synchronous, asynchronous, or line locked even with ±5% line length variation. Output control signals allow glueless interface connections in many applications. The ADV7180 is programmed via a 2-wire, serial bidirectional port (I2C®compatible) and is fabricated in a 1.8 V CMOS process. Its monolithic CMOS construction ensures greater functionality with lower power dissipation. LFCSP package options makes the decoder ideal for space-constrained portable applications. A 64-lead LQFP package is pin compatible with theADV7181C.The 48-Lead LQFP, 40-lead LFCSP, and 32-lead LFCSP use one pin to output VS or FIELD.ApplicationsDigital camcorders and PDAsLow cost SDTV PIP decoder for digital TVsMultichannel DVRs for video securityAV receivers and video transcodingPCI-/USB-based video capture and TV tuner cardsPersonal media players and recordersSmartphone/multimedia handsetsIn-car/automotive infotainment unitsRearview camera/vehicle safety systems
Documents
Technical documentation and resources