Integrated Circuits (ICs)

SN74LV373ATPWR

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Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUT

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Search across all available documentation for this part.

DocumentsSN74LV373AT datasheet (Rev. B)

Integrated Circuits (ICs)

SN74LV373ATPWR

Active

Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUT

Deep-Dive with AI

DocumentsSN74LV373AT datasheet (Rev. B)

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LV373ATPWR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	16 mA
Current - Output High, Low [custom]	16 mA
Delay Time - Propagation	1 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74LV373A-Q1 Series

Automotive Catalog Octal Transparent D-Type Latches With 3-State Outputs

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Independent Circuits	Delay Time - Propagation	Output Type	Mounting Type	Circuit [custom]	Circuit [custom]	Logic Type	Package / Case	Package / Case [y]	Package / Case [x]	Package / Case [y]	Qualification	Grade
Texas Instruments SN74LV373ADBR	5.5 V	2 V	20-SSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SSOP
Texas Instruments SN74LV373ATPWR	5.5 V	4.5 V	20-TSSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-TSSOP	4.4 mm	0.173 in
Texas Instruments SN74LV373ADWRG4	5.5 V	2 V	20-SOIC	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SOIC	0.295 in		7.5 mm
Texas Instruments SN74LV373ATDBR	5.5 V	4.5 V	20-SSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SSOP
Texas Instruments SN74LV373ADW	5.5 V	2 V	20-SOIC	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SOIC	0.295 in		7.5 mm
Texas Instruments SN74LV373ADWR	5.5 V	2 V	20-SOIC	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SOIC	0.295 in		7.5 mm
Texas Instruments SN74LV373AIPWRG4Q1	5.5 V	2 V	20-TSSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-TSSOP	4.4 mm	0.173 in		AEC-Q100	Automotive
Texas Instruments SN74LV373ATDW	5.5 V	4.5 V	20-SOIC	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-SOIC	0.295 in		7.5 mm
Texas Instruments SN74LV373ADGVR	5.5 V	2 V	20-TVSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-TFSOP	0.173 in		4.4 mm
Texas Instruments SN74LV373APWRE4	5.5 V	2 V	20-TSSOP	85 °C	-40 °C	16 mA	16 mA	1	1 ns	Tri-State	Surface Mount	8	8	D-Type Transparent Latch	20-TSSOP	4.4 mm	0.173 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.46
		10	$ 0.39
		25	$ 0.37
		100	$ 0.29
		250	$ 0.27
		500	$ 0.23
		1000	$ 0.18
	Digi-Reel®	1	$ 0.46
		10	$ 0.39
		25	$ 0.37
		100	$ 0.29
		250	$ 0.27
		500	$ 0.23
		1000	$ 0.18
	Tape & Reel (TR)	2000	$ 0.16
		6000	$ 0.15
		10000	$ 0.14
		50000	$ 0.13
Texas Instruments	LARGE T&R	1	$ 0.33
		100	$ 0.22
		250	$ 0.17
		1000	$ 0.11

Description

General part information

SN74LV373A-Q1 Series

The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

OEdoes not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Documents

Technical documentation and resources

SN74LV373AT datasheet (Rev. B)

Data sheet