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SOT-SC70 (DCK)
Integrated Circuits (ICs)

74LVC1G175DCKRG4

Unknown
Texas Instruments

SINGLE D-TYPE FLIP-FLOP WITH ASYNCHRONOUS CLEAR

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SOT-SC70 (DCK)
Integrated Circuits (ICs)

74LVC1G175DCKRG4

Unknown
Texas Instruments

SINGLE D-TYPE FLIP-FLOP WITH ASYNCHRONOUS CLEAR

Technical Specifications

Parameters and characteristics for this part

Specification74LVC1G175DCKRG4
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Current - Quiescent (Iq)10 µA
FunctionReset
Input Capacitance3 pF
Max Propagation Delay @ V, Max CL4 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeNon-Inverted
Package / Case6-TSSOP, SC-88, SOT-363
Supplier Device PackageSC-70-6
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.47
Digi-Reel® 1$ 0.47
Tape & Reel (TR) 6000$ 0.13
15000$ 0.12
30000$ 0.11
75000$ 0.10
Texas InstrumentsLARGE T&R 1$ 0.22
100$ 0.15
250$ 0.12
1000$ 0.08

Description

General part information

SN74LVC1G175 Series

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

LVC Characterization Information

Application note

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Generate an Enable Signal that can be Toggled

Product overview

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Texas Instruments Little Logic Application Report

Application note

Live Insertion

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

SN74LVC1G175 Single D-Type Flip-Flop With Asynchronous Clear datasheet (Rev. G)

Data sheet

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Signal Switch Data Book (Rev. A)

User guide

Logic Guide (Rev. AB)

Selection guide

LOGIC Pocket Data Book (Rev. B)

User guide

Push-Button Circuit (Rev. B)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

How to Select Little Logic (Rev. A)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note