Integrated Circuits (ICs)

CD4093BMG4

Unknown

Texas Instruments

IC GATE NAND 4CH 2-INP 14SOIC

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Integrated Circuits (ICs)

CD4093BMG4

Unknown

Texas Instruments

IC GATE NAND 4CH 2-INP 14SOIC

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Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	CD4093BMG4

Current - Output High, Low [custom]	3.4 mA
Current - Output High, Low [custom]	3.4 mA
Current - Quiescent (Max) [Max]	4 µA
Features	Schmitt Trigger
Input Logic Level - High [Max]	10.8 V
Input Logic Level - High [Min]	3.6 V
Input Logic Level - Low [Max]	4 V
Input Logic Level - Low [Min]	0.9 V
Logic Type	NAND Gate
Max Propagation Delay @ V, Max CL	130 ns
Mounting Type	Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	14-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Voltage - Supply [Max]	18 V
Voltage - Supply [Min]	3 V

CD4093B-Q1 Series

Automotive 4-ch, 2-input, 3-V to 18-V NAND gates with Schmitt-Trigger inputs

Part	Number of Circuits	Operating Temperature [Min]	Operating Temperature [Max]	Mounting Type	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Logic Type	Package / Case [x]	Package / Case [y]	Package / Case	Max Propagation Delay @ V, Max CL	Features	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Current - Quiescent (Max) [Max]	Number of Inputs	Package / Case [custom]	Package / Case [custom]	Supplier Device Package	Grade	Qualification
Texas Instruments CD4093BMT	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2
Texas Instruments CD4093BMG4	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2
Texas Instruments CD4093BPW	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate			14-TSSOP	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2	0.173 "	4.4 mm	14-TSSOP
Texas Instruments CD4093BQM96G4Q1	4	-40 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2				Automotive	AEC-Q100
Texas Instruments CD4093BQM96Q1	4	-40 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2				Automotive	AEC-Q100
Texas Instruments CD4093BPWR	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate			14-TSSOP	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2	0.173 "	4.4 mm	14-TSSOP
Texas Instruments CD4093BNS
Texas Instruments CD4093BM96	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2
Texas Instruments CD4093BE	4	-55 °C	125 °C	Through Hole	0.9 V	4 V	18 V	3 V	NAND Gate	0.3 "	7.62 mm	14-DIP	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2
Texas Instruments CD4093BM96E4	4	-55 °C	125 °C	Surface Mount	0.9 V	4 V	18 V	3 V	NAND Gate	0.154 in	3.9 mm	14-SOIC	130 ns	Schmitt Trigger	3.4 mA	3.4 mA	3.6 V	10.8 V	4 µA	2

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	800	$ 0.63

Description

General part information

CD4093B-Q1 Series

CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative-going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Fig. 2).

The CD4093B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Documents

Technical documentation and resources

No documents available