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Technical Specifications
Parameters and characteristics for this part
| Specification | MC74HC390AFL1 |
|---|---|
| Count Rate | 50 MHz |
| Logic Type | Counter, Decade |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 0.209 " |
| Package / Case | 16-SOIC |
| Package / Case | 5.3 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-SOEIAJ |
| Trigger Type | Negative Edge |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1480 | $ 0.20 | |
Description
General part information
MC74HC390A Series
High-Performance Silicon-Gate CMOSThe MC74HC390A is identical in pinout to the LS390. The device inputs are compatible with standard CMOS outputs; with pullup resistors,they are compatible with LSTTL outputs.This device consists of two independent 4-bit counters, each composed of a divide-by-two and a divide-by-five section. The divide-by-two and divide-by-five counters have separate clock inputs, and can be cascaded to implement various combinations of divide-by-2 and/or divide-by-5 up to a divide-by-100 counter.Flip-flops internal to the counters are triggered by high-to-low transitions of the clock input. A separate, asynchronous reset is provided for each 4-bitcounter. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or strobes except when gated with the Clock of the HC390A.
Documents
Technical documentation and resources
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