The 'ABT8652 scan test devices with octal bus transceivers and registers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. In the normal mode, these devices are functionally equivalent to the 'F652 and 'ABT652 octal bus transceivers and registers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETMoctal bus transceivers and registers. Data flow in each direction is controlled by clock (CLKAB and CLKBA), select (SAB and SBA), and output-enable (OEAB and) inputs. For A-to-B data flow, data on the A bus is clocked into the associated registers on the low-to-high transition of CLKAB. When SAB is low, real-time A data is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for presentation to the B bus (registered mode). When OEAB is high, the B outputs are active. When OEAB is low, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B data flow but uses CLKBA, SBA, andinputs. Since theinput is active low, the A outputs are active whenis low and are in the high-impedance state whenis high. Figure 1 shows the four fundamental bus-management functions that can be performed with the 'ABT8652. In the test mode, the normal operation of the SCOPETMbus transceivers and registers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations as described in IEEE Standard 1149.1-1990. Four dedicated test pins control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54ABT8652 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT8652 is characterized for operation from -40°C to 85°C. The 'ABT8652 scan test devices with octal bus transceivers and registers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. In the normal mode, these devices are functionally equivalent to the 'F652 and 'ABT652 octal bus transceivers and registers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETMoctal bus transceivers and registers. Data flow in each direction is controlled by clock (CLKAB and CLKBA), select (SAB and SBA), and output-enable (OEAB and) inputs. For A-to-B data flow, data on the A bus is clocked into the associated registers on the low-to-high transition of CLKAB. When SAB is low, real-time A data is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for presentation to the B bus (registered mode). When OEAB is high, the B outputs are active. When OEAB is low, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B data flow but uses CLKBA, SBA, andinputs. Since theinput is active low, the A outputs are active whenis low and are in the high-impedance state whenis high. Figure 1 shows the four fundamental bus-management functions that can be performed with the 'ABT8652. In the test mode, the normal operation of the SCOPETMbus transceivers and registers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations as described in IEEE Standard 1149.1-1990. Four dedicated test pins control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54ABT8652 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT8652 is characterized for operation from -40°C to 85°C.

The SN54ABT623A and SN74ABT623 bus transceivers are designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The SN54ABT623A and SN74ABT623 provide true data at their outputs. These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA\) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states. To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The SN54ABT623A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT623 is characterized for operation from -40°C to 85°C. The SN54ABT623A and SN74ABT623 bus transceivers are designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The SN54ABT623A and SN74ABT623 provide true data at their outputs. These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA\) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states. To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The SN54ABT623A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT623 is characterized for operation from -40°C to 85°C.

Octal Buffers And Line/MOS Drivers With 3-State Outputs

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1orOE2) input is high, all eight outputs are in the high-impedance state. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C. The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1orOE2) input is high, all eight outputs are in the high-impedance state. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C.

These devices contain four independent 2-input OR gates. The SN5432, SN54LS32 and SN54S32 are characterized for operation over the full military range of -55°C to 125°C. The SN7432, SN74LS32 and SN74S32 are characterized for operation from 0°C to 70°C. These devices contain four independent 2-input OR gates. The SN5432, SN54LS32 and SN54S32 are characterized for operation over the full military range of -55°C to 125°C. The SN7432, SN74LS32 and SN74S32 are characterized for operation from 0°C to 70°C.

These octal transceivers and line drivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so the buses are effectively isolated. The B-port outputs, which are designed to sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN54ABT2245 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT2245 is characterized for operation from -40°C to 85°C. These octal transceivers and line drivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so the buses are effectively isolated. The B-port outputs, which are designed to sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN54ABT2245 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT2245 is characterized for operation from -40°C to 85°C.

The SN5545xB and SN7545xB devices are dual-peripheral drivers designed for use in systems that employ TTL logic. This family is functionally interchangeable with and replaces the SN75450 family and the SN75450A family devices manufactured previously. The speed of the devices is equal to that of the SN75450 family, and the parts are designed to ensure freedom from latch-up. Diode-clamped inputs simplify circuit design. The SNx5451B, SNx5452B, SNx5453B, and SNx5454B devices are dual peripheral AND, NAND, OR, and NOR drivers, respectively (assuming positive logic), with the output of the logic gates internally connected to the bases of the npn output transistors. The SN5545xB drivers are characterized for operation over the full military range of –55°C to 125°C. The SN7545xB drivers are characterized for operation from 0°C to 70°C. The SN5545xB and SN7545xB devices are dual-peripheral drivers designed for use in systems that employ TTL logic. This family is functionally interchangeable with and replaces the SN75450 family and the SN75450A family devices manufactured previously. The speed of the devices is equal to that of the SN75450 family, and the parts are designed to ensure freedom from latch-up. Diode-clamped inputs simplify circuit design. The SNx5451B, SNx5452B, SNx5453B, and SNx5454B devices are dual peripheral AND, NAND, OR, and NOR drivers, respectively (assuming positive logic), with the output of the logic gates internally connected to the bases of the npn output transistors. The SN5545xB drivers are characterized for operation over the full military range of –55°C to 125°C. The SN7545xB drivers are characterized for operation from 0°C to 70°C.

The 'ABT843 9-bit latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The nine transparent D-type latches provide true data at the outputs. A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT843 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT843 is characterized for operation from -40°C to 85°C. The 'ABT843 9-bit latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The nine transparent D-type latches provide true data at the outputs. A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT843 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT843 is characterized for operation from -40°C to 85°C.

The UC1705 family of power drivers is made with a high sppeed Schottky process to interface between low-level control functions and high-power switching devices - particularly power MOSFETs. These devices are also an optimum choise for capacitive line drivers where up to 1.5 A may be switched in either direction. With both inverting and non-inverting inputs available, logic signals of either polarity may be accepted, or one input can be used to gate or strobe the other. Supply voltages for both VSand VCcan independently range from 5 V to 40 V. For additional application details, see the UC1707/3707 data sheet (SLUS177). The UC1705 is packaged in an 8-pin hermetically sealed CERDIP for -55°C to 125°C operation. The UC3705 is specified for a temperature range of 0°C to 70°C and is available in either a plastic minidip or a 5-pin, powerTO-220 package. The UC1705 family of power drivers is made with a high sppeed Schottky process to interface between low-level control functions and high-power switching devices - particularly power MOSFETs. These devices are also an optimum choise for capacitive line drivers where up to 1.5 A may be switched in either direction. With both inverting and non-inverting inputs available, logic signals of either polarity may be accepted, or one input can be used to gate or strobe the other. Supply voltages for both VSand VCcan independently range from 5 V to 40 V. For additional application details, see the UC1707/3707 data sheet (SLUS177). The UC1705 is packaged in an 8-pin hermetically sealed CERDIP for -55°C to 125°C operation. The UC3705 is specified for a temperature range of 0°C to 70°C and is available in either a plastic minidip or a 5-pin, powerTO-220 package.